Commit 597a0559fd7fd0f2151276f25d9e97dff468ea23
1 parent
188157fe
update from latest Bochs BIOS
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2208 c046a42c-6fe2-441c-8c8c-71466251a162
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pc-bios/bios.bin
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pc-bios/bios.diff
1 | 1 | Index: rombios.h |
2 | 2 | =================================================================== |
3 | 3 | RCS file: /cvsroot/bochs/bochs/bios/rombios.h,v |
4 | -retrieving revision 1.2 | |
5 | -diff -u -w -r1.2 rombios.h | |
6 | ---- rombios.h 1 Oct 2006 16:39:18 -0000 1.2 | |
7 | -+++ rombios.h 2 Oct 2006 18:31:41 -0000 | |
4 | +retrieving revision 1.3 | |
5 | +diff -u -w -r1.3 rombios.h | |
6 | +--- rombios.h 3 Oct 2006 20:27:30 -0000 1.3 | |
7 | ++++ rombios.h 1 Nov 2006 19:16:34 -0000 | |
8 | 8 | @@ -19,7 +19,7 @@ |
9 | 9 | // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
10 | 10 | |
... | ... | @@ -12,50 +12,16 @@ diff -u -w -r1.2 rombios.h |
12 | 12 | -//#define BX_QEMU |
13 | 13 | +#define BX_QEMU |
14 | 14 | |
15 | - #define BX_ROMBIOS32 1 | |
16 | - #define DEBUG_ROMBIOS 0 | |
15 | + #ifndef LEGACY | |
16 | + # define BX_ROMBIOS32 1 | |
17 | 17 | Index: rombios32.c |
18 | 18 | =================================================================== |
19 | 19 | RCS file: /cvsroot/bochs/bochs/bios/rombios32.c,v |
20 | -retrieving revision 1.6 | |
21 | -diff -u -w -r1.6 rombios32.c | |
22 | ---- rombios32.c 2 Oct 2006 06:29:37 -0000 1.6 | |
23 | -+++ rombios32.c 2 Oct 2006 18:31:41 -0000 | |
24 | -@@ -45,6 +45,8 @@ | |
25 | - : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) \ | |
26 | - : "0" (index)) | |
27 | - | |
28 | -+#define wbinvd() asm volatile("wbinvd") | |
29 | -+ | |
30 | - #define CPUID_APIC (1 << 9) | |
31 | - | |
32 | - #define APIC_BASE ((uint8_t *)0xfee00000) | |
33 | -@@ -591,6 +593,7 @@ | |
34 | - PCIDevice *d = &i440_pcidev; | |
35 | - int v; | |
36 | - | |
37 | -+ wbinvd(); | |
38 | - v = pci_config_readb(d, 0x59); | |
39 | - v = (v & 0x0f) | (0x10); | |
40 | - pci_config_writeb(d, 0x59, v); | |
41 | -@@ -645,7 +648,7 @@ | |
42 | - outb(0xb3, 0x01); | |
43 | - | |
44 | - /* raise an SMI interrupt */ | |
45 | -- outb(0xb2, 0x01); | |
46 | -+ outb(0xb2, 0x00); | |
47 | - | |
48 | - /* wait until SMM code executed */ | |
49 | - while (inb(0xb3) != 0x00); | |
50 | -@@ -656,6 +659,7 @@ | |
51 | - /* copy the SMM code */ | |
52 | - memcpy((void *)0xa8000, &smm_code_start, | |
53 | - &smm_code_end - &smm_code_start); | |
54 | -+ wbinvd(); | |
55 | - | |
56 | - /* close the SMM memory window and enable normal SMM */ | |
57 | - pci_config_writeb(&i440_pcidev, 0x72, 0x02 | 0x08); | |
58 | -@@ -848,6 +852,11 @@ | |
20 | +retrieving revision 1.8 | |
21 | +diff -u -w -r1.8 rombios32.c | |
22 | +--- rombios32.c 3 Oct 2006 20:27:30 -0000 1.8 | |
23 | ++++ rombios32.c 1 Nov 2006 19:16:34 -0000 | |
24 | +@@ -852,6 +852,11 @@ | |
59 | 25 | int ioapic_id, i, len; |
60 | 26 | int mp_config_table_size; |
61 | 27 | ... | ... |