Commit 58a26b477e9f864f67a205ee0a8436c4632a389f
1 parent
1ae26a18
Emulate a serial bluetooth HCI with H4+ extensions and attach to n8x0's UART.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5343 c046a42c-6fe2-441c-8c8c-71466251a162
Showing
4 changed files
with
1984 additions
and
1 deletions
Makefile.target
| ... | ... | @@ -612,7 +612,7 @@ OBJS+= omap1.o omap_lcdc.o omap_dma.o omap_clk.o omap_mmc.o omap_i2c.o |
| 612 | 612 | OBJS+= omap2.o omap_dss.o soc_dma.o |
| 613 | 613 | OBJS+= palm.o tsc210x.o |
| 614 | 614 | OBJS+= nseries.o blizzard.o onenand.o vga.o cbus.o tusb6010.o usb-musb.o |
| 615 | -OBJS+= tsc2005.o | |
| 615 | +OBJS+= tsc2005.o bt-hci-csr.o | |
| 616 | 616 | OBJS+= mst_fpga.o mainstone.o |
| 617 | 617 | OBJS+= musicpal.o pflash_cfi02.o |
| 618 | 618 | CPPFLAGS += -DHAS_AUDIO | ... | ... |
hw/bt-hci-csr.c
0 → 100644
| 1 | +/* | |
| 2 | + * Bluetooth serial HCI transport. | |
| 3 | + * CSR41814 HCI with H4p vendor extensions. | |
| 4 | + * | |
| 5 | + * Copyright (C) 2008 Andrzej Zaborowski <balrog@zabor.org> | |
| 6 | + * | |
| 7 | + * This program is free software; you can redistribute it and/or | |
| 8 | + * modify it under the terms of the GNU General Public License as | |
| 9 | + * published by the Free Software Foundation; either version 2 or | |
| 10 | + * (at your option) version 3 of the License. | |
| 11 | + * | |
| 12 | + * This program is distributed in the hope that it will be useful, | |
| 13 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | + * GNU General Public License for more details. | |
| 16 | + * | |
| 17 | + * You should have received a copy of the GNU General Public License | |
| 18 | + * along with this program; if not, write to the Free Software | |
| 19 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 20 | + * MA 02111-1307 USA | |
| 21 | + */ | |
| 22 | + | |
| 23 | +#include "qemu-common.h" | |
| 24 | +#include "qemu-char.h" | |
| 25 | +#include "qemu-timer.h" | |
| 26 | +#include "irq.h" | |
| 27 | +#include "sysemu.h" | |
| 28 | +#include "net.h" | |
| 29 | +#include "bt.h" | |
| 30 | + | |
| 31 | +struct csrhci_s { | |
| 32 | + int enable; | |
| 33 | + qemu_irq *pins; | |
| 34 | + int pin_state; | |
| 35 | + int modem_state; | |
| 36 | + CharDriverState chr; | |
| 37 | +#define FIFO_LEN 4096 | |
| 38 | + int out_start; | |
| 39 | + int out_len; | |
| 40 | + int out_size; | |
| 41 | + uint8_t outfifo[FIFO_LEN * 2]; | |
| 42 | + uint8_t inpkt[FIFO_LEN]; | |
| 43 | + int in_len; | |
| 44 | + int in_hdr; | |
| 45 | + int in_data; | |
| 46 | + QEMUTimer *out_tm; | |
| 47 | + int64_t baud_delay; | |
| 48 | + | |
| 49 | + bdaddr_t bd_addr; | |
| 50 | + struct HCIInfo *hci; | |
| 51 | +}; | |
| 52 | + | |
| 53 | +/* H4+ packet types */ | |
| 54 | +enum { | |
| 55 | + H4_CMD_PKT = 1, | |
| 56 | + H4_ACL_PKT = 2, | |
| 57 | + H4_SCO_PKT = 3, | |
| 58 | + H4_EVT_PKT = 4, | |
| 59 | + H4_NEG_PKT = 6, | |
| 60 | + H4_ALIVE_PKT = 7, | |
| 61 | +}; | |
| 62 | + | |
| 63 | +/* CSR41814 negotiation start magic packet */ | |
| 64 | +static const uint8_t csrhci_neg_packet[] = { | |
| 65 | + H4_NEG_PKT, 10, | |
| 66 | + 0x00, 0xa0, 0x01, 0x00, 0x00, | |
| 67 | + 0x4c, 0x00, 0x96, 0x00, 0x00, | |
| 68 | +}; | |
| 69 | + | |
| 70 | +/* CSR41814 vendor-specific command OCFs */ | |
| 71 | +enum { | |
| 72 | + OCF_CSR_SEND_FIRMWARE = 0x000, | |
| 73 | +}; | |
| 74 | + | |
| 75 | +static inline void csrhci_fifo_wake(struct csrhci_s *s) | |
| 76 | +{ | |
| 77 | + if (!s->enable || !s->out_len) | |
| 78 | + return; | |
| 79 | + | |
| 80 | + /* XXX: Should wait for s->modem_state & CHR_TIOCM_RTS? */ | |
| 81 | + if (s->chr.chr_can_read && s->chr.chr_can_read(s->chr.handler_opaque) && | |
| 82 | + s->chr.chr_read) { | |
| 83 | + s->chr.chr_read(s->chr.handler_opaque, | |
| 84 | + s->outfifo + s->out_start ++, 1); | |
| 85 | + s->out_len --; | |
| 86 | + if (s->out_start >= s->out_size) { | |
| 87 | + s->out_start = 0; | |
| 88 | + s->out_size = FIFO_LEN; | |
| 89 | + } | |
| 90 | + } | |
| 91 | + | |
| 92 | + if (s->out_len) | |
| 93 | + qemu_mod_timer(s->out_tm, qemu_get_clock(vm_clock) + s->baud_delay); | |
| 94 | +} | |
| 95 | + | |
| 96 | +#define csrhci_out_packetz(s, len) memset(csrhci_out_packet(s, len), 0, len) | |
| 97 | +static uint8_t *csrhci_out_packet(struct csrhci_s *s, int len) | |
| 98 | +{ | |
| 99 | + int off = s->out_start + s->out_len; | |
| 100 | + | |
| 101 | + /* TODO: do the padding here, i.e. align len */ | |
| 102 | + s->out_len += len; | |
| 103 | + | |
| 104 | + if (off < FIFO_LEN) { | |
| 105 | + if (off + len > FIFO_LEN && (s->out_size = off + len) > FIFO_LEN * 2) { | |
| 106 | + fprintf(stderr, "%s: can't alloc %i bytes\n", __FUNCTION__, len); | |
| 107 | + exit(-1); | |
| 108 | + } | |
| 109 | + return s->outfifo + off; | |
| 110 | + } | |
| 111 | + | |
| 112 | + if (s->out_len > s->out_size) { | |
| 113 | + fprintf(stderr, "%s: can't alloc %i bytes\n", __FUNCTION__, len); | |
| 114 | + exit(-1); | |
| 115 | + } | |
| 116 | + | |
| 117 | + return s->outfifo + off - s->out_size; | |
| 118 | +} | |
| 119 | + | |
| 120 | +static inline uint8_t *csrhci_out_packet_csr(struct csrhci_s *s, | |
| 121 | + int type, int len) | |
| 122 | +{ | |
| 123 | + uint8_t *ret = csrhci_out_packetz(s, len + 2); | |
| 124 | + | |
| 125 | + *ret ++ = type; | |
| 126 | + *ret ++ = len; | |
| 127 | + | |
| 128 | + return ret; | |
| 129 | +} | |
| 130 | + | |
| 131 | +static inline uint8_t *csrhci_out_packet_event(struct csrhci_s *s, | |
| 132 | + int evt, int len) | |
| 133 | +{ | |
| 134 | + uint8_t *ret = csrhci_out_packetz(s, | |
| 135 | + len + 1 + sizeof(struct hci_event_hdr)); | |
| 136 | + | |
| 137 | + *ret ++ = H4_EVT_PKT; | |
| 138 | + ((struct hci_event_hdr *) ret)->evt = evt; | |
| 139 | + ((struct hci_event_hdr *) ret)->plen = len; | |
| 140 | + | |
| 141 | + return ret + sizeof(struct hci_event_hdr); | |
| 142 | +} | |
| 143 | + | |
| 144 | +static void csrhci_in_packet_vendor(struct csrhci_s *s, int ocf, | |
| 145 | + uint8_t *data, int len) | |
| 146 | +{ | |
| 147 | + int offset; | |
| 148 | + uint8_t *rpkt; | |
| 149 | + | |
| 150 | + switch (ocf) { | |
| 151 | + case OCF_CSR_SEND_FIRMWARE: | |
| 152 | + /* Check if this is the bd_address packet */ | |
| 153 | + if (len >= 18 + 8 && data[12] == 0x01 && data[13] == 0x00) { | |
| 154 | + offset = 18; | |
| 155 | + s->bd_addr.b[0] = data[offset + 7]; /* Beyond cmd packet end(!?) */ | |
| 156 | + s->bd_addr.b[1] = data[offset + 6]; | |
| 157 | + s->bd_addr.b[2] = data[offset + 4]; | |
| 158 | + s->bd_addr.b[3] = data[offset + 0]; | |
| 159 | + s->bd_addr.b[4] = data[offset + 3]; | |
| 160 | + s->bd_addr.b[5] = data[offset + 2]; | |
| 161 | + | |
| 162 | + s->hci->bdaddr_set(s->hci, s->bd_addr.b); | |
| 163 | + fprintf(stderr, "%s: bd_address loaded from firmware: " | |
| 164 | + "%02x:%02x:%02x:%02x:%02x:%02x\n", __FUNCTION__, | |
| 165 | + s->bd_addr.b[0], s->bd_addr.b[1], s->bd_addr.b[2], | |
| 166 | + s->bd_addr.b[3], s->bd_addr.b[4], s->bd_addr.b[5]); | |
| 167 | + } | |
| 168 | + | |
| 169 | + rpkt = csrhci_out_packet_event(s, EVT_VENDOR, 11); | |
| 170 | + /* Status bytes: no error */ | |
| 171 | + rpkt[9] = 0x00; | |
| 172 | + rpkt[10] = 0x00; | |
| 173 | + break; | |
| 174 | + | |
| 175 | + default: | |
| 176 | + fprintf(stderr, "%s: got a bad CMD packet\n", __FUNCTION__); | |
| 177 | + return; | |
| 178 | + } | |
| 179 | + | |
| 180 | + csrhci_fifo_wake(s); | |
| 181 | +} | |
| 182 | + | |
| 183 | +static void csrhci_in_packet(struct csrhci_s *s, uint8_t *pkt) | |
| 184 | +{ | |
| 185 | + uint8_t *rpkt; | |
| 186 | + int opc; | |
| 187 | + | |
| 188 | + switch (*pkt ++) { | |
| 189 | + case H4_CMD_PKT: | |
| 190 | + opc = le16_to_cpu(((struct hci_command_hdr *) pkt)->opcode); | |
| 191 | + if (cmd_opcode_ogf(opc) == OGF_VENDOR_CMD) { | |
| 192 | + csrhci_in_packet_vendor(s, cmd_opcode_ocf(opc), | |
| 193 | + pkt + sizeof(struct hci_command_hdr), | |
| 194 | + s->in_len - sizeof(struct hci_command_hdr) - 1); | |
| 195 | + return; | |
| 196 | + } | |
| 197 | + | |
| 198 | + /* TODO: if the command is OCF_READ_LOCAL_COMMANDS or the likes, | |
| 199 | + * we need to send it to the HCI layer and then add our supported | |
| 200 | + * commands to the returned mask (such as OGF_VENDOR_CMD). With | |
| 201 | + * bt-hci.c we could just have hooks for this kind of commands but | |
| 202 | + * we can't with bt-host.c. */ | |
| 203 | + | |
| 204 | + s->hci->cmd_send(s->hci, pkt, s->in_len - 1); | |
| 205 | + break; | |
| 206 | + | |
| 207 | + case H4_EVT_PKT: | |
| 208 | + goto bad_pkt; | |
| 209 | + | |
| 210 | + case H4_ACL_PKT: | |
| 211 | + s->hci->acl_send(s->hci, pkt, s->in_len - 1); | |
| 212 | + break; | |
| 213 | + | |
| 214 | + case H4_SCO_PKT: | |
| 215 | + s->hci->sco_send(s->hci, pkt, s->in_len - 1); | |
| 216 | + break; | |
| 217 | + | |
| 218 | + case H4_NEG_PKT: | |
| 219 | + if (s->in_hdr != sizeof(csrhci_neg_packet) || | |
| 220 | + memcmp(pkt - 1, csrhci_neg_packet, s->in_hdr)) { | |
| 221 | + fprintf(stderr, "%s: got a bad NEG packet\n", __FUNCTION__); | |
| 222 | + return; | |
| 223 | + } | |
| 224 | + pkt += 2; | |
| 225 | + | |
| 226 | + rpkt = csrhci_out_packet_csr(s, H4_NEG_PKT, 10); | |
| 227 | + | |
| 228 | + *rpkt ++ = 0x20; /* Operational settings negotation Ok */ | |
| 229 | + memcpy(rpkt, pkt, 7); rpkt += 7; | |
| 230 | + *rpkt ++ = 0xff; | |
| 231 | + *rpkt ++ = 0xff; | |
| 232 | + break; | |
| 233 | + | |
| 234 | + case H4_ALIVE_PKT: | |
| 235 | + if (s->in_hdr != 4 || pkt[1] != 0x55 || pkt[2] != 0x00) { | |
| 236 | + fprintf(stderr, "%s: got a bad ALIVE packet\n", __FUNCTION__); | |
| 237 | + return; | |
| 238 | + } | |
| 239 | + | |
| 240 | + rpkt = csrhci_out_packet_csr(s, H4_ALIVE_PKT, 2); | |
| 241 | + | |
| 242 | + *rpkt ++ = 0xcc; | |
| 243 | + *rpkt ++ = 0x00; | |
| 244 | + break; | |
| 245 | + | |
| 246 | + default: | |
| 247 | + bad_pkt: | |
| 248 | + /* TODO: error out */ | |
| 249 | + fprintf(stderr, "%s: got a bad packet\n", __FUNCTION__); | |
| 250 | + break; | |
| 251 | + } | |
| 252 | + | |
| 253 | + csrhci_fifo_wake(s); | |
| 254 | +} | |
| 255 | + | |
| 256 | +static int csrhci_header_len(const uint8_t *pkt) | |
| 257 | +{ | |
| 258 | + switch (pkt[0]) { | |
| 259 | + case H4_CMD_PKT: | |
| 260 | + return HCI_COMMAND_HDR_SIZE; | |
| 261 | + case H4_EVT_PKT: | |
| 262 | + return HCI_EVENT_HDR_SIZE; | |
| 263 | + case H4_ACL_PKT: | |
| 264 | + return HCI_ACL_HDR_SIZE; | |
| 265 | + case H4_SCO_PKT: | |
| 266 | + return HCI_SCO_HDR_SIZE; | |
| 267 | + case H4_NEG_PKT: | |
| 268 | + return pkt[1] + 1; | |
| 269 | + case H4_ALIVE_PKT: | |
| 270 | + return 3; | |
| 271 | + } | |
| 272 | + | |
| 273 | + exit(-1); | |
| 274 | +} | |
| 275 | + | |
| 276 | +static int csrhci_data_len(const uint8_t *pkt) | |
| 277 | +{ | |
| 278 | + switch (*pkt ++) { | |
| 279 | + case H4_CMD_PKT: | |
| 280 | + /* It seems that vendor-specific command packets for H4+ are all | |
| 281 | + * one byte longer than indicated in the standard header. */ | |
| 282 | + if (le16_to_cpu(((struct hci_command_hdr *) pkt)->opcode) == 0xfc00) | |
| 283 | + return (((struct hci_command_hdr *) pkt)->plen + 1) & ~1; | |
| 284 | + | |
| 285 | + return ((struct hci_command_hdr *) pkt)->plen; | |
| 286 | + case H4_EVT_PKT: | |
| 287 | + return ((struct hci_event_hdr *) pkt)->plen; | |
| 288 | + case H4_ACL_PKT: | |
| 289 | + return le16_to_cpu(((struct hci_acl_hdr *) pkt)->dlen); | |
| 290 | + case H4_SCO_PKT: | |
| 291 | + return ((struct hci_sco_hdr *) pkt)->dlen; | |
| 292 | + case H4_NEG_PKT: | |
| 293 | + case H4_ALIVE_PKT: | |
| 294 | + return 0; | |
| 295 | + } | |
| 296 | + | |
| 297 | + exit(-1); | |
| 298 | +} | |
| 299 | + | |
| 300 | +static int csrhci_write(struct CharDriverState *chr, | |
| 301 | + const uint8_t *buf, int len) | |
| 302 | +{ | |
| 303 | + struct csrhci_s *s = (struct csrhci_s *) chr->opaque; | |
| 304 | + int plen = s->in_len; | |
| 305 | + | |
| 306 | + if (!s->enable) | |
| 307 | + return 0; | |
| 308 | + | |
| 309 | + s->in_len += len; | |
| 310 | + memcpy(s->inpkt + plen, buf, len); | |
| 311 | + | |
| 312 | + while (1) { | |
| 313 | + if (s->in_len >= 2 && plen < 2) | |
| 314 | + s->in_hdr = csrhci_header_len(s->inpkt) + 1; | |
| 315 | + | |
| 316 | + if (s->in_len >= s->in_hdr && plen < s->in_hdr) | |
| 317 | + s->in_data = csrhci_data_len(s->inpkt) + s->in_hdr; | |
| 318 | + | |
| 319 | + if (s->in_len >= s->in_data) { | |
| 320 | + csrhci_in_packet(s, s->inpkt); | |
| 321 | + | |
| 322 | + memmove(s->inpkt, s->inpkt + s->in_len, s->in_len - s->in_data); | |
| 323 | + s->in_len -= s->in_data; | |
| 324 | + s->in_hdr = INT_MAX; | |
| 325 | + s->in_data = INT_MAX; | |
| 326 | + plen = 0; | |
| 327 | + } else | |
| 328 | + break; | |
| 329 | + } | |
| 330 | + | |
| 331 | + return len; | |
| 332 | +} | |
| 333 | + | |
| 334 | +static void csrhci_out_hci_packet_event(void *opaque, | |
| 335 | + const uint8_t *data, int len) | |
| 336 | +{ | |
| 337 | + struct csrhci_s *s = (struct csrhci_s *) opaque; | |
| 338 | + uint8_t *pkt = csrhci_out_packet(s, (len + 2) & ~1); /* Align */ | |
| 339 | + | |
| 340 | + *pkt ++ = H4_EVT_PKT; | |
| 341 | + memcpy(pkt, data, len); | |
| 342 | + | |
| 343 | + csrhci_fifo_wake(s); | |
| 344 | +} | |
| 345 | + | |
| 346 | +static void csrhci_out_hci_packet_acl(void *opaque, | |
| 347 | + const uint8_t *data, int len) | |
| 348 | +{ | |
| 349 | + struct csrhci_s *s = (struct csrhci_s *) opaque; | |
| 350 | + uint8_t *pkt = csrhci_out_packet(s, (len + 2) & ~1); /* Align */ | |
| 351 | + | |
| 352 | + *pkt ++ = H4_ACL_PKT; | |
| 353 | + pkt[len & ~1] = 0; | |
| 354 | + memcpy(pkt, data, len); | |
| 355 | + | |
| 356 | + csrhci_fifo_wake(s); | |
| 357 | +} | |
| 358 | + | |
| 359 | +static int csrhci_ioctl(struct CharDriverState *chr, int cmd, void *arg) | |
| 360 | +{ | |
| 361 | + QEMUSerialSetParams *ssp; | |
| 362 | + struct csrhci_s *s = (struct csrhci_s *) chr->opaque; | |
| 363 | + int prev_state = s->modem_state; | |
| 364 | + | |
| 365 | + switch (cmd) { | |
| 366 | + case CHR_IOCTL_SERIAL_SET_PARAMS: | |
| 367 | + ssp = (QEMUSerialSetParams *) arg; | |
| 368 | + s->baud_delay = ticks_per_sec / ssp->speed; | |
| 369 | + /* Moments later... (but shorter than 100ms) */ | |
| 370 | + s->modem_state |= CHR_TIOCM_CTS; | |
| 371 | + break; | |
| 372 | + | |
| 373 | + case CHR_IOCTL_SERIAL_GET_TIOCM: | |
| 374 | + *(int *) arg = s->modem_state; | |
| 375 | + break; | |
| 376 | + | |
| 377 | + case CHR_IOCTL_SERIAL_SET_TIOCM: | |
| 378 | + s->modem_state = *(int *) arg; | |
| 379 | + if (~s->modem_state & prev_state & CHR_TIOCM_RTS) | |
| 380 | + s->modem_state &= ~CHR_TIOCM_CTS; | |
| 381 | + break; | |
| 382 | + | |
| 383 | + default: | |
| 384 | + return -ENOTSUP; | |
| 385 | + } | |
| 386 | + return 0; | |
| 387 | +} | |
| 388 | + | |
| 389 | +static void csrhci_reset(struct csrhci_s *s) | |
| 390 | +{ | |
| 391 | + s->out_len = 0; | |
| 392 | + s->out_size = FIFO_LEN; | |
| 393 | + s->in_len = 0; | |
| 394 | + s->baud_delay = ticks_per_sec; | |
| 395 | + s->enable = 0; | |
| 396 | + s->in_hdr = INT_MAX; | |
| 397 | + s->in_data = INT_MAX; | |
| 398 | + | |
| 399 | + s->modem_state = 0; | |
| 400 | + /* After a while... (but sooner than 10ms) */ | |
| 401 | + s->modem_state |= CHR_TIOCM_CTS; | |
| 402 | + | |
| 403 | + memset(&s->bd_addr, 0, sizeof(bdaddr_t)); | |
| 404 | +} | |
| 405 | + | |
| 406 | +static void csrhci_out_tick(void *opaque) | |
| 407 | +{ | |
| 408 | + csrhci_fifo_wake((struct csrhci_s *) opaque); | |
| 409 | +} | |
| 410 | + | |
| 411 | +static void csrhci_pins(void *opaque, int line, int level) | |
| 412 | +{ | |
| 413 | + struct csrhci_s *s = (struct csrhci_s *) opaque; | |
| 414 | + int state = s->pin_state; | |
| 415 | + | |
| 416 | + s->pin_state &= ~(1 << line); | |
| 417 | + s->pin_state |= (!!level) << line; | |
| 418 | + | |
| 419 | + if ((state & ~s->pin_state) & (1 << csrhci_pin_reset)) { | |
| 420 | + /* TODO: Disappear from lower layers */ | |
| 421 | + csrhci_reset(s); | |
| 422 | + } | |
| 423 | + | |
| 424 | + if (s->pin_state == 3 && state != 3) { | |
| 425 | + s->enable = 1; | |
| 426 | + /* TODO: Wake lower layers up */ | |
| 427 | + } | |
| 428 | +} | |
| 429 | + | |
| 430 | +qemu_irq *csrhci_pins_get(CharDriverState *chr) | |
| 431 | +{ | |
| 432 | + struct csrhci_s *s = (struct csrhci_s *) chr->opaque; | |
| 433 | + | |
| 434 | + return s->pins; | |
| 435 | +} | |
| 436 | + | |
| 437 | +CharDriverState *uart_hci_init(qemu_irq wakeup) | |
| 438 | +{ | |
| 439 | + struct csrhci_s *s = (struct csrhci_s *) | |
| 440 | + qemu_mallocz(sizeof(struct csrhci_s)); | |
| 441 | + | |
| 442 | + s->chr.opaque = s; | |
| 443 | + s->chr.chr_write = csrhci_write; | |
| 444 | + s->chr.chr_ioctl = csrhci_ioctl; | |
| 445 | + | |
| 446 | + s->hci = qemu_next_hci(); | |
| 447 | + s->hci->opaque = s; | |
| 448 | + s->hci->evt_recv = csrhci_out_hci_packet_event; | |
| 449 | + s->hci->acl_recv = csrhci_out_hci_packet_acl; | |
| 450 | + | |
| 451 | + s->out_tm = qemu_new_timer(vm_clock, csrhci_out_tick, s); | |
| 452 | + s->pins = qemu_allocate_irqs(csrhci_pins, s, __csrhci_pins); | |
| 453 | + csrhci_reset(s); | |
| 454 | + | |
| 455 | + return &s->chr; | |
| 456 | +} | ... | ... |
hw/bt.h
| ... | ... | @@ -103,3 +103,1515 @@ struct bt_device_s { |
| 103 | 103 | /* bt.c */ |
| 104 | 104 | void bt_device_init(struct bt_device_s *dev, struct bt_scatternet_s *net); |
| 105 | 105 | void bt_device_done(struct bt_device_s *dev); |
| 106 | + | |
| 107 | +/* bt-hci-csr.c */ | |
| 108 | +enum { | |
| 109 | + csrhci_pin_reset, | |
| 110 | + csrhci_pin_wakeup, | |
| 111 | + __csrhci_pins, | |
| 112 | +}; | |
| 113 | +qemu_irq *csrhci_pins_get(CharDriverState *chr); | |
| 114 | +CharDriverState *uart_hci_init(qemu_irq wakeup); | |
| 115 | + | |
| 116 | +/* Link Management Protocol layer defines */ | |
| 117 | + | |
| 118 | +#define LLID_ACLU_CONT 0x1 | |
| 119 | +#define LLID_ACLU_START 0x2 | |
| 120 | +#define LLID_ACLC 0x3 | |
| 121 | + | |
| 122 | +enum lmp_pdu_type { | |
| 123 | + LMP_NAME_REQ = 0x0001, | |
| 124 | + LMP_NAME_RES = 0x0002, | |
| 125 | + LMP_ACCEPTED = 0x0003, | |
| 126 | + LMP_NOT_ACCEPTED = 0x0004, | |
| 127 | + LMP_CLKOFFSET_REQ = 0x0005, | |
| 128 | + LMP_CLKOFFSET_RES = 0x0006, | |
| 129 | + LMP_DETACH = 0x0007, | |
| 130 | + LMP_IN_RAND = 0x0008, | |
| 131 | + LMP_COMB_KEY = 0x0009, | |
| 132 | + LMP_UNIT_KEY = 0x000a, | |
| 133 | + LMP_AU_RAND = 0x000b, | |
| 134 | + LMP_SRES = 0x000c, | |
| 135 | + LMP_TEMP_RAND = 0x000d, | |
| 136 | + LMP_TEMP_KEY = 0x000e, | |
| 137 | + LMP_CRYPT_MODE_REQ = 0x000f, | |
| 138 | + LMP_CRYPT_KEY_SIZE_REQ = 0x0010, | |
| 139 | + LMP_START_ENCRYPT_REQ = 0x0011, | |
| 140 | + LMP_STOP_ENCRYPT_REQ = 0x0012, | |
| 141 | + LMP_SWITCH_REQ = 0x0013, | |
| 142 | + LMP_HOLD = 0x0014, | |
| 143 | + LMP_HOLD_REQ = 0x0015, | |
| 144 | + LMP_SNIFF_REQ = 0x0017, | |
| 145 | + LMP_UNSNIFF_REQ = 0x0018, | |
| 146 | + LMP_LMP_PARK_REQ = 0x0019, | |
| 147 | + LMP_SET_BCAST_SCAN_WND = 0x001b, | |
| 148 | + LMP_MODIFY_BEACON = 0x001c, | |
| 149 | + LMP_UNPARK_BD_ADDR_REQ = 0x001d, | |
| 150 | + LMP_UNPARK_PM_ADDR_REQ = 0x001e, | |
| 151 | + LMP_INCR_POWER_REQ = 0x001f, | |
| 152 | + LMP_DECR_POWER_REQ = 0x0020, | |
| 153 | + LMP_MAX_POWER = 0x0021, | |
| 154 | + LMP_MIN_POWER = 0x0022, | |
| 155 | + LMP_AUTO_RATE = 0x0023, | |
| 156 | + LMP_PREFERRED_RATE = 0x0024, | |
| 157 | + LMP_VERSION_REQ = 0x0025, | |
| 158 | + LMP_VERSION_RES = 0x0026, | |
| 159 | + LMP_FEATURES_REQ = 0x0027, | |
| 160 | + LMP_FEATURES_RES = 0x0028, | |
| 161 | + LMP_QUALITY_OF_SERVICE = 0x0029, | |
| 162 | + LMP_QOS_REQ = 0x002a, | |
| 163 | + LMP_RM_SCO_LINK_REQ = 0x002b, | |
| 164 | + LMP_SCO_LINK_REQ = 0x002c, | |
| 165 | + LMP_MAX_SLOT = 0x002d, | |
| 166 | + LMP_MAX_SLOT_REQ = 0x002e, | |
| 167 | + LMP_TIMING_ACCURACY_REQ = 0x002f, | |
| 168 | + LMP_TIMING_ACCURACY_RES = 0x0030, | |
| 169 | + LMP_SETUP_COMPLETE = 0x0031, | |
| 170 | + LMP_USE_SEMIPERM_KEY = 0x0032, | |
| 171 | + LMP_HOST_CONNECTION_REQ = 0x0033, | |
| 172 | + LMP_SLOT_OFFSET = 0x0034, | |
| 173 | + LMP_PAGE_MODE_REQ = 0x0035, | |
| 174 | + LMP_PAGE_SCAN_MODE_REQ = 0x0036, | |
| 175 | + LMP_SUPERVISION_TIMEOUT = 0x0037, | |
| 176 | + LMP_TEST_ACTIVATE = 0x0038, | |
| 177 | + LMP_TEST_CONTROL = 0x0039, | |
| 178 | + LMP_CRYPT_KEY_MASK_REQ = 0x003a, | |
| 179 | + LMP_CRYPT_KEY_MASK_RES = 0x003b, | |
| 180 | + LMP_SET_AFH = 0x003c, | |
| 181 | + LMP_ACCEPTED_EXT = 0x7f01, | |
| 182 | + LMP_NOT_ACCEPTED_EXT = 0x7f02, | |
| 183 | + LMP_FEATURES_REQ_EXT = 0x7f03, | |
| 184 | + LMP_FEATURES_RES_EXT = 0x7f04, | |
| 185 | + LMP_PACKET_TYPE_TBL_REQ = 0x7f0b, | |
| 186 | + LMP_ESCO_LINK_REQ = 0x7f0c, | |
| 187 | + LMP_RM_ESCO_LINK_REQ = 0x7f0d, | |
| 188 | + LMP_CHANNEL_CLASS_REQ = 0x7f10, | |
| 189 | + LMP_CHANNEL_CLASS = 0x7f11, | |
| 190 | +}; | |
| 191 | + | |
| 192 | +/* Host Controller Interface layer defines */ | |
| 193 | + | |
| 194 | +enum hci_packet_type { | |
| 195 | + HCI_COMMAND_PKT = 0x01, | |
| 196 | + HCI_ACLDATA_PKT = 0x02, | |
| 197 | + HCI_SCODATA_PKT = 0x03, | |
| 198 | + HCI_EVENT_PKT = 0x04, | |
| 199 | + HCI_VENDOR_PKT = 0xff, | |
| 200 | +}; | |
| 201 | + | |
| 202 | +enum bt_packet_type { | |
| 203 | + HCI_2DH1 = 1 << 1, | |
| 204 | + HCI_3DH1 = 1 << 2, | |
| 205 | + HCI_DM1 = 1 << 3, | |
| 206 | + HCI_DH1 = 1 << 4, | |
| 207 | + HCI_2DH3 = 1 << 8, | |
| 208 | + HCI_3DH3 = 1 << 9, | |
| 209 | + HCI_DM3 = 1 << 10, | |
| 210 | + HCI_DH3 = 1 << 11, | |
| 211 | + HCI_2DH5 = 1 << 12, | |
| 212 | + HCI_3DH5 = 1 << 13, | |
| 213 | + HCI_DM5 = 1 << 14, | |
| 214 | + HCI_DH5 = 1 << 15, | |
| 215 | +}; | |
| 216 | + | |
| 217 | +enum sco_packet_type { | |
| 218 | + HCI_HV1 = 1 << 5, | |
| 219 | + HCI_HV2 = 1 << 6, | |
| 220 | + HCI_HV3 = 1 << 7, | |
| 221 | +}; | |
| 222 | + | |
| 223 | +enum ev_packet_type { | |
| 224 | + HCI_EV3 = 1 << 3, | |
| 225 | + HCI_EV4 = 1 << 4, | |
| 226 | + HCI_EV5 = 1 << 5, | |
| 227 | + HCI_2EV3 = 1 << 6, | |
| 228 | + HCI_3EV3 = 1 << 7, | |
| 229 | + HCI_2EV5 = 1 << 8, | |
| 230 | + HCI_3EV5 = 1 << 9, | |
| 231 | +}; | |
| 232 | + | |
| 233 | +enum hci_error_code { | |
| 234 | + HCI_SUCCESS = 0x00, | |
| 235 | + HCI_UNKNOWN_COMMAND = 0x01, | |
| 236 | + HCI_NO_CONNECTION = 0x02, | |
| 237 | + HCI_HARDWARE_FAILURE = 0x03, | |
| 238 | + HCI_PAGE_TIMEOUT = 0x04, | |
| 239 | + HCI_AUTHENTICATION_FAILURE = 0x05, | |
| 240 | + HCI_PIN_OR_KEY_MISSING = 0x06, | |
| 241 | + HCI_MEMORY_FULL = 0x07, | |
| 242 | + HCI_CONNECTION_TIMEOUT = 0x08, | |
| 243 | + HCI_MAX_NUMBER_OF_CONNECTIONS = 0x09, | |
| 244 | + HCI_MAX_NUMBER_OF_SCO_CONNECTIONS = 0x0a, | |
| 245 | + HCI_ACL_CONNECTION_EXISTS = 0x0b, | |
| 246 | + HCI_COMMAND_DISALLOWED = 0x0c, | |
| 247 | + HCI_REJECTED_LIMITED_RESOURCES = 0x0d, | |
| 248 | + HCI_REJECTED_SECURITY = 0x0e, | |
| 249 | + HCI_REJECTED_PERSONAL = 0x0f, | |
| 250 | + HCI_HOST_TIMEOUT = 0x10, | |
| 251 | + HCI_UNSUPPORTED_FEATURE = 0x11, | |
| 252 | + HCI_INVALID_PARAMETERS = 0x12, | |
| 253 | + HCI_OE_USER_ENDED_CONNECTION = 0x13, | |
| 254 | + HCI_OE_LOW_RESOURCES = 0x14, | |
| 255 | + HCI_OE_POWER_OFF = 0x15, | |
| 256 | + HCI_CONNECTION_TERMINATED = 0x16, | |
| 257 | + HCI_REPEATED_ATTEMPTS = 0x17, | |
| 258 | + HCI_PAIRING_NOT_ALLOWED = 0x18, | |
| 259 | + HCI_UNKNOWN_LMP_PDU = 0x19, | |
| 260 | + HCI_UNSUPPORTED_REMOTE_FEATURE = 0x1a, | |
| 261 | + HCI_SCO_OFFSET_REJECTED = 0x1b, | |
| 262 | + HCI_SCO_INTERVAL_REJECTED = 0x1c, | |
| 263 | + HCI_AIR_MODE_REJECTED = 0x1d, | |
| 264 | + HCI_INVALID_LMP_PARAMETERS = 0x1e, | |
| 265 | + HCI_UNSPECIFIED_ERROR = 0x1f, | |
| 266 | + HCI_UNSUPPORTED_LMP_PARAMETER_VALUE = 0x20, | |
| 267 | + HCI_ROLE_CHANGE_NOT_ALLOWED = 0x21, | |
| 268 | + HCI_LMP_RESPONSE_TIMEOUT = 0x22, | |
| 269 | + HCI_LMP_ERROR_TRANSACTION_COLLISION = 0x23, | |
| 270 | + HCI_LMP_PDU_NOT_ALLOWED = 0x24, | |
| 271 | + HCI_ENCRYPTION_MODE_NOT_ACCEPTED = 0x25, | |
| 272 | + HCI_UNIT_LINK_KEY_USED = 0x26, | |
| 273 | + HCI_QOS_NOT_SUPPORTED = 0x27, | |
| 274 | + HCI_INSTANT_PASSED = 0x28, | |
| 275 | + HCI_PAIRING_NOT_SUPPORTED = 0x29, | |
| 276 | + HCI_TRANSACTION_COLLISION = 0x2a, | |
| 277 | + HCI_QOS_UNACCEPTABLE_PARAMETER = 0x2c, | |
| 278 | + HCI_QOS_REJECTED = 0x2d, | |
| 279 | + HCI_CLASSIFICATION_NOT_SUPPORTED = 0x2e, | |
| 280 | + HCI_INSUFFICIENT_SECURITY = 0x2f, | |
| 281 | + HCI_PARAMETER_OUT_OF_RANGE = 0x30, | |
| 282 | + HCI_ROLE_SWITCH_PENDING = 0x32, | |
| 283 | + HCI_SLOT_VIOLATION = 0x34, | |
| 284 | + HCI_ROLE_SWITCH_FAILED = 0x35, | |
| 285 | +}; | |
| 286 | + | |
| 287 | +enum acl_flag_bits { | |
| 288 | + ACL_CONT = 1 << 0, | |
| 289 | + ACL_START = 1 << 1, | |
| 290 | + ACL_ACTIVE_BCAST = 1 << 2, | |
| 291 | + ACL_PICO_BCAST = 1 << 3, | |
| 292 | +}; | |
| 293 | + | |
| 294 | +enum baseband_link_type { | |
| 295 | + SCO_LINK = 0x00, | |
| 296 | + ACL_LINK = 0x01, | |
| 297 | +}; | |
| 298 | + | |
| 299 | +enum lmp_feature_bits0 { | |
| 300 | + LMP_3SLOT = 1 << 0, | |
| 301 | + LMP_5SLOT = 1 << 1, | |
| 302 | + LMP_ENCRYPT = 1 << 2, | |
| 303 | + LMP_SOFFSET = 1 << 3, | |
| 304 | + LMP_TACCURACY = 1 << 4, | |
| 305 | + LMP_RSWITCH = 1 << 5, | |
| 306 | + LMP_HOLD_MODE = 1 << 6, | |
| 307 | + LMP_SNIFF_MODE = 1 << 7, | |
| 308 | +}; | |
| 309 | + | |
| 310 | +enum lmp_feature_bits1 { | |
| 311 | + LMP_PARK = 1 << 0, | |
| 312 | + LMP_RSSI = 1 << 1, | |
| 313 | + LMP_QUALITY = 1 << 2, | |
| 314 | + LMP_SCO = 1 << 3, | |
| 315 | + LMP_HV2 = 1 << 4, | |
| 316 | + LMP_HV3 = 1 << 5, | |
| 317 | + LMP_ULAW = 1 << 6, | |
| 318 | + LMP_ALAW = 1 << 7, | |
| 319 | +}; | |
| 320 | + | |
| 321 | +enum lmp_feature_bits2 { | |
| 322 | + LMP_CVSD = 1 << 0, | |
| 323 | + LMP_PSCHEME = 1 << 1, | |
| 324 | + LMP_PCONTROL = 1 << 2, | |
| 325 | + LMP_TRSP_SCO = 1 << 3, | |
| 326 | + LMP_BCAST_ENC = 1 << 7, | |
| 327 | +}; | |
| 328 | + | |
| 329 | +enum lmp_feature_bits3 { | |
| 330 | + LMP_EDR_ACL_2M = 1 << 1, | |
| 331 | + LMP_EDR_ACL_3M = 1 << 2, | |
| 332 | + LMP_ENH_ISCAN = 1 << 3, | |
| 333 | + LMP_ILACE_ISCAN = 1 << 4, | |
| 334 | + LMP_ILACE_PSCAN = 1 << 5, | |
| 335 | + LMP_RSSI_INQ = 1 << 6, | |
| 336 | + LMP_ESCO = 1 << 7, | |
| 337 | +}; | |
| 338 | + | |
| 339 | +enum lmp_feature_bits4 { | |
| 340 | + LMP_EV4 = 1 << 0, | |
| 341 | + LMP_EV5 = 1 << 1, | |
| 342 | + LMP_AFH_CAP_SLV = 1 << 3, | |
| 343 | + LMP_AFH_CLS_SLV = 1 << 4, | |
| 344 | + LMP_EDR_3SLOT = 1 << 7, | |
| 345 | +}; | |
| 346 | + | |
| 347 | +enum lmp_feature_bits5 { | |
| 348 | + LMP_EDR_5SLOT = 1 << 0, | |
| 349 | + LMP_SNIFF_SUBR = 1 << 1, | |
| 350 | + LMP_AFH_CAP_MST = 1 << 3, | |
| 351 | + LMP_AFH_CLS_MST = 1 << 4, | |
| 352 | + LMP_EDR_ESCO_2M = 1 << 5, | |
| 353 | + LMP_EDR_ESCO_3M = 1 << 6, | |
| 354 | + LMP_EDR_3S_ESCO = 1 << 7, | |
| 355 | +}; | |
| 356 | + | |
| 357 | +enum lmp_feature_bits6 { | |
| 358 | + LMP_EXT_INQ = 1 << 0, | |
| 359 | +}; | |
| 360 | + | |
| 361 | +enum lmp_feature_bits7 { | |
| 362 | + LMP_EXT_FEAT = 1 << 7, | |
| 363 | +}; | |
| 364 | + | |
| 365 | +enum hci_link_policy { | |
| 366 | + HCI_LP_RSWITCH = 1 << 0, | |
| 367 | + HCI_LP_HOLD = 1 << 1, | |
| 368 | + HCI_LP_SNIFF = 1 << 2, | |
| 369 | + HCI_LP_PARK = 1 << 3, | |
| 370 | +}; | |
| 371 | + | |
| 372 | +enum hci_link_mode { | |
| 373 | + HCI_LM_ACCEPT = 1 << 15, | |
| 374 | + HCI_LM_MASTER = 1 << 0, | |
| 375 | + HCI_LM_AUTH = 1 << 1, | |
| 376 | + HCI_LM_ENCRYPT = 1 << 2, | |
| 377 | + HCI_LM_TRUSTED = 1 << 3, | |
| 378 | + HCI_LM_RELIABLE = 1 << 4, | |
| 379 | + HCI_LM_SECURE = 1 << 5, | |
| 380 | +}; | |
| 381 | + | |
| 382 | +/* HCI Commands */ | |
| 383 | + | |
| 384 | +/* Link Control */ | |
| 385 | +#define OGF_LINK_CTL 0x01 | |
| 386 | + | |
| 387 | +#define OCF_INQUIRY 0x0001 | |
| 388 | +typedef struct { | |
| 389 | + uint8_t lap[3]; | |
| 390 | + uint8_t length; /* 1.28s units */ | |
| 391 | + uint8_t num_rsp; | |
| 392 | +} __attribute__ ((packed)) inquiry_cp; | |
| 393 | +#define INQUIRY_CP_SIZE 5 | |
| 394 | + | |
| 395 | +typedef struct { | |
| 396 | + uint8_t status; | |
| 397 | + bdaddr_t bdaddr; | |
| 398 | +} __attribute__ ((packed)) status_bdaddr_rp; | |
| 399 | +#define STATUS_BDADDR_RP_SIZE 7 | |
| 400 | + | |
| 401 | +#define OCF_INQUIRY_CANCEL 0x0002 | |
| 402 | + | |
| 403 | +#define OCF_PERIODIC_INQUIRY 0x0003 | |
| 404 | +typedef struct { | |
| 405 | + uint16_t max_period; /* 1.28s units */ | |
| 406 | + uint16_t min_period; /* 1.28s units */ | |
| 407 | + uint8_t lap[3]; | |
| 408 | + uint8_t length; /* 1.28s units */ | |
| 409 | + uint8_t num_rsp; | |
| 410 | +} __attribute__ ((packed)) periodic_inquiry_cp; | |
| 411 | +#define PERIODIC_INQUIRY_CP_SIZE 9 | |
| 412 | + | |
| 413 | +#define OCF_EXIT_PERIODIC_INQUIRY 0x0004 | |
| 414 | + | |
| 415 | +#define OCF_CREATE_CONN 0x0005 | |
| 416 | +typedef struct { | |
| 417 | + bdaddr_t bdaddr; | |
| 418 | + uint16_t pkt_type; | |
| 419 | + uint8_t pscan_rep_mode; | |
| 420 | + uint8_t pscan_mode; | |
| 421 | + uint16_t clock_offset; | |
| 422 | + uint8_t role_switch; | |
| 423 | +} __attribute__ ((packed)) create_conn_cp; | |
| 424 | +#define CREATE_CONN_CP_SIZE 13 | |
| 425 | + | |
| 426 | +#define OCF_DISCONNECT 0x0006 | |
| 427 | +typedef struct { | |
| 428 | + uint16_t handle; | |
| 429 | + uint8_t reason; | |
| 430 | +} __attribute__ ((packed)) disconnect_cp; | |
| 431 | +#define DISCONNECT_CP_SIZE 3 | |
| 432 | + | |
| 433 | +#define OCF_ADD_SCO 0x0007 | |
| 434 | +typedef struct { | |
| 435 | + uint16_t handle; | |
| 436 | + uint16_t pkt_type; | |
| 437 | +} __attribute__ ((packed)) add_sco_cp; | |
| 438 | +#define ADD_SCO_CP_SIZE 4 | |
| 439 | + | |
| 440 | +#define OCF_CREATE_CONN_CANCEL 0x0008 | |
| 441 | +typedef struct { | |
| 442 | + uint8_t status; | |
| 443 | + bdaddr_t bdaddr; | |
| 444 | +} __attribute__ ((packed)) create_conn_cancel_cp; | |
| 445 | +#define CREATE_CONN_CANCEL_CP_SIZE 6 | |
| 446 | + | |
| 447 | +typedef struct { | |
| 448 | + uint8_t status; | |
| 449 | + bdaddr_t bdaddr; | |
| 450 | +} __attribute__ ((packed)) create_conn_cancel_rp; | |
| 451 | +#define CREATE_CONN_CANCEL_RP_SIZE 7 | |
| 452 | + | |
| 453 | +#define OCF_ACCEPT_CONN_REQ 0x0009 | |
| 454 | +typedef struct { | |
| 455 | + bdaddr_t bdaddr; | |
| 456 | + uint8_t role; | |
| 457 | +} __attribute__ ((packed)) accept_conn_req_cp; | |
| 458 | +#define ACCEPT_CONN_REQ_CP_SIZE 7 | |
| 459 | + | |
| 460 | +#define OCF_REJECT_CONN_REQ 0x000A | |
| 461 | +typedef struct { | |
| 462 | + bdaddr_t bdaddr; | |
| 463 | + uint8_t reason; | |
| 464 | +} __attribute__ ((packed)) reject_conn_req_cp; | |
| 465 | +#define REJECT_CONN_REQ_CP_SIZE 7 | |
| 466 | + | |
| 467 | +#define OCF_LINK_KEY_REPLY 0x000B | |
| 468 | +typedef struct { | |
| 469 | + bdaddr_t bdaddr; | |
| 470 | + uint8_t link_key[16]; | |
| 471 | +} __attribute__ ((packed)) link_key_reply_cp; | |
| 472 | +#define LINK_KEY_REPLY_CP_SIZE 22 | |
| 473 | + | |
| 474 | +#define OCF_LINK_KEY_NEG_REPLY 0x000C | |
| 475 | + | |
| 476 | +#define OCF_PIN_CODE_REPLY 0x000D | |
| 477 | +typedef struct { | |
| 478 | + bdaddr_t bdaddr; | |
| 479 | + uint8_t pin_len; | |
| 480 | + uint8_t pin_code[16]; | |
| 481 | +} __attribute__ ((packed)) pin_code_reply_cp; | |
| 482 | +#define PIN_CODE_REPLY_CP_SIZE 23 | |
| 483 | + | |
| 484 | +#define OCF_PIN_CODE_NEG_REPLY 0x000E | |
| 485 | + | |
| 486 | +#define OCF_SET_CONN_PTYPE 0x000F | |
| 487 | +typedef struct { | |
| 488 | + uint16_t handle; | |
| 489 | + uint16_t pkt_type; | |
| 490 | +} __attribute__ ((packed)) set_conn_ptype_cp; | |
| 491 | +#define SET_CONN_PTYPE_CP_SIZE 4 | |
| 492 | + | |
| 493 | +#define OCF_AUTH_REQUESTED 0x0011 | |
| 494 | +typedef struct { | |
| 495 | + uint16_t handle; | |
| 496 | +} __attribute__ ((packed)) auth_requested_cp; | |
| 497 | +#define AUTH_REQUESTED_CP_SIZE 2 | |
| 498 | + | |
| 499 | +#define OCF_SET_CONN_ENCRYPT 0x0013 | |
| 500 | +typedef struct { | |
| 501 | + uint16_t handle; | |
| 502 | + uint8_t encrypt; | |
| 503 | +} __attribute__ ((packed)) set_conn_encrypt_cp; | |
| 504 | +#define SET_CONN_ENCRYPT_CP_SIZE 3 | |
| 505 | + | |
| 506 | +#define OCF_CHANGE_CONN_LINK_KEY 0x0015 | |
| 507 | +typedef struct { | |
| 508 | + uint16_t handle; | |
| 509 | +} __attribute__ ((packed)) change_conn_link_key_cp; | |
| 510 | +#define CHANGE_CONN_LINK_KEY_CP_SIZE 2 | |
| 511 | + | |
| 512 | +#define OCF_MASTER_LINK_KEY 0x0017 | |
| 513 | +typedef struct { | |
| 514 | + uint8_t key_flag; | |
| 515 | +} __attribute__ ((packed)) master_link_key_cp; | |
| 516 | +#define MASTER_LINK_KEY_CP_SIZE 1 | |
| 517 | + | |
| 518 | +#define OCF_REMOTE_NAME_REQ 0x0019 | |
| 519 | +typedef struct { | |
| 520 | + bdaddr_t bdaddr; | |
| 521 | + uint8_t pscan_rep_mode; | |
| 522 | + uint8_t pscan_mode; | |
| 523 | + uint16_t clock_offset; | |
| 524 | +} __attribute__ ((packed)) remote_name_req_cp; | |
| 525 | +#define REMOTE_NAME_REQ_CP_SIZE 10 | |
| 526 | + | |
| 527 | +#define OCF_REMOTE_NAME_REQ_CANCEL 0x001A | |
| 528 | +typedef struct { | |
| 529 | + bdaddr_t bdaddr; | |
| 530 | +} __attribute__ ((packed)) remote_name_req_cancel_cp; | |
| 531 | +#define REMOTE_NAME_REQ_CANCEL_CP_SIZE 6 | |
| 532 | + | |
| 533 | +typedef struct { | |
| 534 | + uint8_t status; | |
| 535 | + bdaddr_t bdaddr; | |
| 536 | +} __attribute__ ((packed)) remote_name_req_cancel_rp; | |
| 537 | +#define REMOTE_NAME_REQ_CANCEL_RP_SIZE 7 | |
| 538 | + | |
| 539 | +#define OCF_READ_REMOTE_FEATURES 0x001B | |
| 540 | +typedef struct { | |
| 541 | + uint16_t handle; | |
| 542 | +} __attribute__ ((packed)) read_remote_features_cp; | |
| 543 | +#define READ_REMOTE_FEATURES_CP_SIZE 2 | |
| 544 | + | |
| 545 | +#define OCF_READ_REMOTE_EXT_FEATURES 0x001C | |
| 546 | +typedef struct { | |
| 547 | + uint16_t handle; | |
| 548 | + uint8_t page_num; | |
| 549 | +} __attribute__ ((packed)) read_remote_ext_features_cp; | |
| 550 | +#define READ_REMOTE_EXT_FEATURES_CP_SIZE 3 | |
| 551 | + | |
| 552 | +#define OCF_READ_REMOTE_VERSION 0x001D | |
| 553 | +typedef struct { | |
| 554 | + uint16_t handle; | |
| 555 | +} __attribute__ ((packed)) read_remote_version_cp; | |
| 556 | +#define READ_REMOTE_VERSION_CP_SIZE 2 | |
| 557 | + | |
| 558 | +#define OCF_READ_CLOCK_OFFSET 0x001F | |
| 559 | +typedef struct { | |
| 560 | + uint16_t handle; | |
| 561 | +} __attribute__ ((packed)) read_clock_offset_cp; | |
| 562 | +#define READ_CLOCK_OFFSET_CP_SIZE 2 | |
| 563 | + | |
| 564 | +#define OCF_READ_LMP_HANDLE 0x0020 | |
| 565 | +typedef struct { | |
| 566 | + uint16_t handle; | |
| 567 | +} __attribute__ ((packed)) read_lmp_handle_cp; | |
| 568 | +#define READ_LMP_HANDLE_CP_SIZE 2 | |
| 569 | + | |
| 570 | +typedef struct { | |
| 571 | + uint8_t status; | |
| 572 | + uint16_t handle; | |
| 573 | + uint8_t lmp_handle; | |
| 574 | + uint32_t reserved; | |
| 575 | +} __attribute__ ((packed)) read_lmp_handle_rp; | |
| 576 | +#define READ_LMP_HANDLE_RP_SIZE 8 | |
| 577 | + | |
| 578 | +#define OCF_SETUP_SYNC_CONN 0x0028 | |
| 579 | +typedef struct { | |
| 580 | + uint16_t handle; | |
| 581 | + uint32_t tx_bandwith; | |
| 582 | + uint32_t rx_bandwith; | |
| 583 | + uint16_t max_latency; | |
| 584 | + uint16_t voice_setting; | |
| 585 | + uint8_t retrans_effort; | |
| 586 | + uint16_t pkt_type; | |
| 587 | +} __attribute__ ((packed)) setup_sync_conn_cp; | |
| 588 | +#define SETUP_SYNC_CONN_CP_SIZE 17 | |
| 589 | + | |
| 590 | +#define OCF_ACCEPT_SYNC_CONN_REQ 0x0029 | |
| 591 | +typedef struct { | |
| 592 | + bdaddr_t bdaddr; | |
| 593 | + uint32_t tx_bandwith; | |
| 594 | + uint32_t rx_bandwith; | |
| 595 | + uint16_t max_latency; | |
| 596 | + uint16_t voice_setting; | |
| 597 | + uint8_t retrans_effort; | |
| 598 | + uint16_t pkt_type; | |
| 599 | +} __attribute__ ((packed)) accept_sync_conn_req_cp; | |
| 600 | +#define ACCEPT_SYNC_CONN_REQ_CP_SIZE 21 | |
| 601 | + | |
| 602 | +#define OCF_REJECT_SYNC_CONN_REQ 0x002A | |
| 603 | +typedef struct { | |
| 604 | + bdaddr_t bdaddr; | |
| 605 | + uint8_t reason; | |
| 606 | +} __attribute__ ((packed)) reject_sync_conn_req_cp; | |
| 607 | +#define REJECT_SYNC_CONN_REQ_CP_SIZE 7 | |
| 608 | + | |
| 609 | +/* Link Policy */ | |
| 610 | +#define OGF_LINK_POLICY 0x02 | |
| 611 | + | |
| 612 | +#define OCF_HOLD_MODE 0x0001 | |
| 613 | +typedef struct { | |
| 614 | + uint16_t handle; | |
| 615 | + uint16_t max_interval; | |
| 616 | + uint16_t min_interval; | |
| 617 | +} __attribute__ ((packed)) hold_mode_cp; | |
| 618 | +#define HOLD_MODE_CP_SIZE 6 | |
| 619 | + | |
| 620 | +#define OCF_SNIFF_MODE 0x0003 | |
| 621 | +typedef struct { | |
| 622 | + uint16_t handle; | |
| 623 | + uint16_t max_interval; | |
| 624 | + uint16_t min_interval; | |
| 625 | + uint16_t attempt; | |
| 626 | + uint16_t timeout; | |
| 627 | +} __attribute__ ((packed)) sniff_mode_cp; | |
| 628 | +#define SNIFF_MODE_CP_SIZE 10 | |
| 629 | + | |
| 630 | +#define OCF_EXIT_SNIFF_MODE 0x0004 | |
| 631 | +typedef struct { | |
| 632 | + uint16_t handle; | |
| 633 | +} __attribute__ ((packed)) exit_sniff_mode_cp; | |
| 634 | +#define EXIT_SNIFF_MODE_CP_SIZE 2 | |
| 635 | + | |
| 636 | +#define OCF_PARK_MODE 0x0005 | |
| 637 | +typedef struct { | |
| 638 | + uint16_t handle; | |
| 639 | + uint16_t max_interval; | |
| 640 | + uint16_t min_interval; | |
| 641 | +} __attribute__ ((packed)) park_mode_cp; | |
| 642 | +#define PARK_MODE_CP_SIZE 6 | |
| 643 | + | |
| 644 | +#define OCF_EXIT_PARK_MODE 0x0006 | |
| 645 | +typedef struct { | |
| 646 | + uint16_t handle; | |
| 647 | +} __attribute__ ((packed)) exit_park_mode_cp; | |
| 648 | +#define EXIT_PARK_MODE_CP_SIZE 2 | |
| 649 | + | |
| 650 | +#define OCF_QOS_SETUP 0x0007 | |
| 651 | +typedef struct { | |
| 652 | + uint8_t service_type; /* 1 = best effort */ | |
| 653 | + uint32_t token_rate; /* Byte per seconds */ | |
| 654 | + uint32_t peak_bandwidth; /* Byte per seconds */ | |
| 655 | + uint32_t latency; /* Microseconds */ | |
| 656 | + uint32_t delay_variation; /* Microseconds */ | |
| 657 | +} __attribute__ ((packed)) hci_qos; | |
| 658 | +#define HCI_QOS_CP_SIZE 17 | |
| 659 | +typedef struct { | |
| 660 | + uint16_t handle; | |
| 661 | + uint8_t flags; /* Reserved */ | |
| 662 | + hci_qos qos; | |
| 663 | +} __attribute__ ((packed)) qos_setup_cp; | |
| 664 | +#define QOS_SETUP_CP_SIZE (3 + HCI_QOS_CP_SIZE) | |
| 665 | + | |
| 666 | +#define OCF_ROLE_DISCOVERY 0x0009 | |
| 667 | +typedef struct { | |
| 668 | + uint16_t handle; | |
| 669 | +} __attribute__ ((packed)) role_discovery_cp; | |
| 670 | +#define ROLE_DISCOVERY_CP_SIZE 2 | |
| 671 | +typedef struct { | |
| 672 | + uint8_t status; | |
| 673 | + uint16_t handle; | |
| 674 | + uint8_t role; | |
| 675 | +} __attribute__ ((packed)) role_discovery_rp; | |
| 676 | +#define ROLE_DISCOVERY_RP_SIZE 4 | |
| 677 | + | |
| 678 | +#define OCF_SWITCH_ROLE 0x000B | |
| 679 | +typedef struct { | |
| 680 | + bdaddr_t bdaddr; | |
| 681 | + uint8_t role; | |
| 682 | +} __attribute__ ((packed)) switch_role_cp; | |
| 683 | +#define SWITCH_ROLE_CP_SIZE 7 | |
| 684 | + | |
| 685 | +#define OCF_READ_LINK_POLICY 0x000C | |
| 686 | +typedef struct { | |
| 687 | + uint16_t handle; | |
| 688 | +} __attribute__ ((packed)) read_link_policy_cp; | |
| 689 | +#define READ_LINK_POLICY_CP_SIZE 2 | |
| 690 | +typedef struct { | |
| 691 | + uint8_t status; | |
| 692 | + uint16_t handle; | |
| 693 | + uint16_t policy; | |
| 694 | +} __attribute__ ((packed)) read_link_policy_rp; | |
| 695 | +#define READ_LINK_POLICY_RP_SIZE 5 | |
| 696 | + | |
| 697 | +#define OCF_WRITE_LINK_POLICY 0x000D | |
| 698 | +typedef struct { | |
| 699 | + uint16_t handle; | |
| 700 | + uint16_t policy; | |
| 701 | +} __attribute__ ((packed)) write_link_policy_cp; | |
| 702 | +#define WRITE_LINK_POLICY_CP_SIZE 4 | |
| 703 | +typedef struct { | |
| 704 | + uint8_t status; | |
| 705 | + uint16_t handle; | |
| 706 | +} __attribute__ ((packed)) write_link_policy_rp; | |
| 707 | +#define WRITE_LINK_POLICY_RP_SIZE 3 | |
| 708 | + | |
| 709 | +#define OCF_READ_DEFAULT_LINK_POLICY 0x000E | |
| 710 | + | |
| 711 | +#define OCF_WRITE_DEFAULT_LINK_POLICY 0x000F | |
| 712 | + | |
| 713 | +#define OCF_FLOW_SPECIFICATION 0x0010 | |
| 714 | + | |
| 715 | +#define OCF_SNIFF_SUBRATE 0x0011 | |
| 716 | +typedef struct { | |
| 717 | + uint16_t handle; | |
| 718 | + uint16_t max_remote_latency; | |
| 719 | + uint16_t max_local_latency; | |
| 720 | + uint16_t min_remote_timeout; | |
| 721 | + uint16_t min_local_timeout; | |
| 722 | +} __attribute__ ((packed)) sniff_subrate_cp; | |
| 723 | +#define SNIFF_SUBRATE_CP_SIZE 10 | |
| 724 | + | |
| 725 | +/* Host Controller and Baseband */ | |
| 726 | +#define OGF_HOST_CTL 0x03 | |
| 727 | + | |
| 728 | +#define OCF_SET_EVENT_MASK 0x0001 | |
| 729 | +typedef struct { | |
| 730 | + uint8_t mask[8]; | |
| 731 | +} __attribute__ ((packed)) set_event_mask_cp; | |
| 732 | +#define SET_EVENT_MASK_CP_SIZE 8 | |
| 733 | + | |
| 734 | +#define OCF_RESET 0x0003 | |
| 735 | + | |
| 736 | +#define OCF_SET_EVENT_FLT 0x0005 | |
| 737 | +typedef struct { | |
| 738 | + uint8_t flt_type; | |
| 739 | + uint8_t cond_type; | |
| 740 | + uint8_t condition[0]; | |
| 741 | +} __attribute__ ((packed)) set_event_flt_cp; | |
| 742 | +#define SET_EVENT_FLT_CP_SIZE 2 | |
| 743 | + | |
| 744 | +enum bt_filter_type { | |
| 745 | + FLT_CLEAR_ALL = 0x00, | |
| 746 | + FLT_INQ_RESULT = 0x01, | |
| 747 | + FLT_CONN_SETUP = 0x02, | |
| 748 | +}; | |
| 749 | +enum inq_result_cond_type { | |
| 750 | + INQ_RESULT_RETURN_ALL = 0x00, | |
| 751 | + INQ_RESULT_RETURN_CLASS = 0x01, | |
| 752 | + INQ_RESULT_RETURN_BDADDR = 0x02, | |
| 753 | +}; | |
| 754 | +enum conn_setup_cond_type { | |
| 755 | + CONN_SETUP_ALLOW_ALL = 0x00, | |
| 756 | + CONN_SETUP_ALLOW_CLASS = 0x01, | |
| 757 | + CONN_SETUP_ALLOW_BDADDR = 0x02, | |
| 758 | +}; | |
| 759 | +enum conn_setup_cond { | |
| 760 | + CONN_SETUP_AUTO_OFF = 0x01, | |
| 761 | + CONN_SETUP_AUTO_ON = 0x02, | |
| 762 | +}; | |
| 763 | + | |
| 764 | +#define OCF_FLUSH 0x0008 | |
| 765 | +typedef struct { | |
| 766 | + uint16_t handle; | |
| 767 | +} __attribute__ ((packed)) flush_cp; | |
| 768 | +#define FLUSH_CP_SIZE 2 | |
| 769 | + | |
| 770 | +typedef struct { | |
| 771 | + uint8_t status; | |
| 772 | + uint16_t handle; | |
| 773 | +} __attribute__ ((packed)) flush_rp; | |
| 774 | +#define FLUSH_RP_SIZE 3 | |
| 775 | + | |
| 776 | +#define OCF_READ_PIN_TYPE 0x0009 | |
| 777 | +typedef struct { | |
| 778 | + uint8_t status; | |
| 779 | + uint8_t pin_type; | |
| 780 | +} __attribute__ ((packed)) read_pin_type_rp; | |
| 781 | +#define READ_PIN_TYPE_RP_SIZE 2 | |
| 782 | + | |
| 783 | +#define OCF_WRITE_PIN_TYPE 0x000A | |
| 784 | +typedef struct { | |
| 785 | + uint8_t pin_type; | |
| 786 | +} __attribute__ ((packed)) write_pin_type_cp; | |
| 787 | +#define WRITE_PIN_TYPE_CP_SIZE 1 | |
| 788 | + | |
| 789 | +#define OCF_CREATE_NEW_UNIT_KEY 0x000B | |
| 790 | + | |
| 791 | +#define OCF_READ_STORED_LINK_KEY 0x000D | |
| 792 | +typedef struct { | |
| 793 | + bdaddr_t bdaddr; | |
| 794 | + uint8_t read_all; | |
| 795 | +} __attribute__ ((packed)) read_stored_link_key_cp; | |
| 796 | +#define READ_STORED_LINK_KEY_CP_SIZE 7 | |
| 797 | +typedef struct { | |
| 798 | + uint8_t status; | |
| 799 | + uint16_t max_keys; | |
| 800 | + uint16_t num_keys; | |
| 801 | +} __attribute__ ((packed)) read_stored_link_key_rp; | |
| 802 | +#define READ_STORED_LINK_KEY_RP_SIZE 5 | |
| 803 | + | |
| 804 | +#define OCF_WRITE_STORED_LINK_KEY 0x0011 | |
| 805 | +typedef struct { | |
| 806 | + uint8_t num_keys; | |
| 807 | + /* variable length part */ | |
| 808 | +} __attribute__ ((packed)) write_stored_link_key_cp; | |
| 809 | +#define WRITE_STORED_LINK_KEY_CP_SIZE 1 | |
| 810 | +typedef struct { | |
| 811 | + uint8_t status; | |
| 812 | + uint8_t num_keys; | |
| 813 | +} __attribute__ ((packed)) write_stored_link_key_rp; | |
| 814 | +#define READ_WRITE_LINK_KEY_RP_SIZE 2 | |
| 815 | + | |
| 816 | +#define OCF_DELETE_STORED_LINK_KEY 0x0012 | |
| 817 | +typedef struct { | |
| 818 | + bdaddr_t bdaddr; | |
| 819 | + uint8_t delete_all; | |
| 820 | +} __attribute__ ((packed)) delete_stored_link_key_cp; | |
| 821 | +#define DELETE_STORED_LINK_KEY_CP_SIZE 7 | |
| 822 | +typedef struct { | |
| 823 | + uint8_t status; | |
| 824 | + uint16_t num_keys; | |
| 825 | +} __attribute__ ((packed)) delete_stored_link_key_rp; | |
| 826 | +#define DELETE_STORED_LINK_KEY_RP_SIZE 3 | |
| 827 | + | |
| 828 | +#define OCF_CHANGE_LOCAL_NAME 0x0013 | |
| 829 | +typedef struct { | |
| 830 | + char name[248]; | |
| 831 | +} __attribute__ ((packed)) change_local_name_cp; | |
| 832 | +#define CHANGE_LOCAL_NAME_CP_SIZE 248 | |
| 833 | + | |
| 834 | +#define OCF_READ_LOCAL_NAME 0x0014 | |
| 835 | +typedef struct { | |
| 836 | + uint8_t status; | |
| 837 | + char name[248]; | |
| 838 | +} __attribute__ ((packed)) read_local_name_rp; | |
| 839 | +#define READ_LOCAL_NAME_RP_SIZE 249 | |
| 840 | + | |
| 841 | +#define OCF_READ_CONN_ACCEPT_TIMEOUT 0x0015 | |
| 842 | +typedef struct { | |
| 843 | + uint8_t status; | |
| 844 | + uint16_t timeout; | |
| 845 | +} __attribute__ ((packed)) read_conn_accept_timeout_rp; | |
| 846 | +#define READ_CONN_ACCEPT_TIMEOUT_RP_SIZE 3 | |
| 847 | + | |
| 848 | +#define OCF_WRITE_CONN_ACCEPT_TIMEOUT 0x0016 | |
| 849 | +typedef struct { | |
| 850 | + uint16_t timeout; | |
| 851 | +} __attribute__ ((packed)) write_conn_accept_timeout_cp; | |
| 852 | +#define WRITE_CONN_ACCEPT_TIMEOUT_CP_SIZE 2 | |
| 853 | + | |
| 854 | +#define OCF_READ_PAGE_TIMEOUT 0x0017 | |
| 855 | +typedef struct { | |
| 856 | + uint8_t status; | |
| 857 | + uint16_t timeout; | |
| 858 | +} __attribute__ ((packed)) read_page_timeout_rp; | |
| 859 | +#define READ_PAGE_TIMEOUT_RP_SIZE 3 | |
| 860 | + | |
| 861 | +#define OCF_WRITE_PAGE_TIMEOUT 0x0018 | |
| 862 | +typedef struct { | |
| 863 | + uint16_t timeout; | |
| 864 | +} __attribute__ ((packed)) write_page_timeout_cp; | |
| 865 | +#define WRITE_PAGE_TIMEOUT_CP_SIZE 2 | |
| 866 | + | |
| 867 | +#define OCF_READ_SCAN_ENABLE 0x0019 | |
| 868 | +typedef struct { | |
| 869 | + uint8_t status; | |
| 870 | + uint8_t enable; | |
| 871 | +} __attribute__ ((packed)) read_scan_enable_rp; | |
| 872 | +#define READ_SCAN_ENABLE_RP_SIZE 2 | |
| 873 | + | |
| 874 | +#define OCF_WRITE_SCAN_ENABLE 0x001A | |
| 875 | +typedef struct { | |
| 876 | + uint8_t scan_enable; | |
| 877 | +} __attribute__ ((packed)) write_scan_enable_cp; | |
| 878 | +#define WRITE_SCAN_ENABLE_CP_SIZE 1 | |
| 879 | + | |
| 880 | +enum scan_enable_bits { | |
| 881 | + SCAN_DISABLED = 0, | |
| 882 | + SCAN_INQUIRY = 1 << 0, | |
| 883 | + SCAN_PAGE = 1 << 1, | |
| 884 | +}; | |
| 885 | + | |
| 886 | +#define OCF_READ_PAGE_ACTIVITY 0x001B | |
| 887 | +typedef struct { | |
| 888 | + uint8_t status; | |
| 889 | + uint16_t interval; | |
| 890 | + uint16_t window; | |
| 891 | +} __attribute__ ((packed)) read_page_activity_rp; | |
| 892 | +#define READ_PAGE_ACTIVITY_RP_SIZE 5 | |
| 893 | + | |
| 894 | +#define OCF_WRITE_PAGE_ACTIVITY 0x001C | |
| 895 | +typedef struct { | |
| 896 | + uint16_t interval; | |
| 897 | + uint16_t window; | |
| 898 | +} __attribute__ ((packed)) write_page_activity_cp; | |
| 899 | +#define WRITE_PAGE_ACTIVITY_CP_SIZE 4 | |
| 900 | + | |
| 901 | +#define OCF_READ_INQ_ACTIVITY 0x001D | |
| 902 | +typedef struct { | |
| 903 | + uint8_t status; | |
| 904 | + uint16_t interval; | |
| 905 | + uint16_t window; | |
| 906 | +} __attribute__ ((packed)) read_inq_activity_rp; | |
| 907 | +#define READ_INQ_ACTIVITY_RP_SIZE 5 | |
| 908 | + | |
| 909 | +#define OCF_WRITE_INQ_ACTIVITY 0x001E | |
| 910 | +typedef struct { | |
| 911 | + uint16_t interval; | |
| 912 | + uint16_t window; | |
| 913 | +} __attribute__ ((packed)) write_inq_activity_cp; | |
| 914 | +#define WRITE_INQ_ACTIVITY_CP_SIZE 4 | |
| 915 | + | |
| 916 | +#define OCF_READ_AUTH_ENABLE 0x001F | |
| 917 | + | |
| 918 | +#define OCF_WRITE_AUTH_ENABLE 0x0020 | |
| 919 | + | |
| 920 | +#define AUTH_DISABLED 0x00 | |
| 921 | +#define AUTH_ENABLED 0x01 | |
| 922 | + | |
| 923 | +#define OCF_READ_ENCRYPT_MODE 0x0021 | |
| 924 | + | |
| 925 | +#define OCF_WRITE_ENCRYPT_MODE 0x0022 | |
| 926 | + | |
| 927 | +#define ENCRYPT_DISABLED 0x00 | |
| 928 | +#define ENCRYPT_P2P 0x01 | |
| 929 | +#define ENCRYPT_BOTH 0x02 | |
| 930 | + | |
| 931 | +#define OCF_READ_CLASS_OF_DEV 0x0023 | |
| 932 | +typedef struct { | |
| 933 | + uint8_t status; | |
| 934 | + uint8_t dev_class[3]; | |
| 935 | +} __attribute__ ((packed)) read_class_of_dev_rp; | |
| 936 | +#define READ_CLASS_OF_DEV_RP_SIZE 4 | |
| 937 | + | |
| 938 | +#define OCF_WRITE_CLASS_OF_DEV 0x0024 | |
| 939 | +typedef struct { | |
| 940 | + uint8_t dev_class[3]; | |
| 941 | +} __attribute__ ((packed)) write_class_of_dev_cp; | |
| 942 | +#define WRITE_CLASS_OF_DEV_CP_SIZE 3 | |
| 943 | + | |
| 944 | +#define OCF_READ_VOICE_SETTING 0x0025 | |
| 945 | +typedef struct { | |
| 946 | + uint8_t status; | |
| 947 | + uint16_t voice_setting; | |
| 948 | +} __attribute__ ((packed)) read_voice_setting_rp; | |
| 949 | +#define READ_VOICE_SETTING_RP_SIZE 3 | |
| 950 | + | |
| 951 | +#define OCF_WRITE_VOICE_SETTING 0x0026 | |
| 952 | +typedef struct { | |
| 953 | + uint16_t voice_setting; | |
| 954 | +} __attribute__ ((packed)) write_voice_setting_cp; | |
| 955 | +#define WRITE_VOICE_SETTING_CP_SIZE 2 | |
| 956 | + | |
| 957 | +#define OCF_READ_AUTOMATIC_FLUSH_TIMEOUT 0x0027 | |
| 958 | + | |
| 959 | +#define OCF_WRITE_AUTOMATIC_FLUSH_TIMEOUT 0x0028 | |
| 960 | + | |
| 961 | +#define OCF_READ_NUM_BROADCAST_RETRANS 0x0029 | |
| 962 | + | |
| 963 | +#define OCF_WRITE_NUM_BROADCAST_RETRANS 0x002A | |
| 964 | + | |
| 965 | +#define OCF_READ_HOLD_MODE_ACTIVITY 0x002B | |
| 966 | + | |
| 967 | +#define OCF_WRITE_HOLD_MODE_ACTIVITY 0x002C | |
| 968 | + | |
| 969 | +#define OCF_READ_TRANSMIT_POWER_LEVEL 0x002D | |
| 970 | +typedef struct { | |
| 971 | + uint16_t handle; | |
| 972 | + uint8_t type; | |
| 973 | +} __attribute__ ((packed)) read_transmit_power_level_cp; | |
| 974 | +#define READ_TRANSMIT_POWER_LEVEL_CP_SIZE 3 | |
| 975 | +typedef struct { | |
| 976 | + uint8_t status; | |
| 977 | + uint16_t handle; | |
| 978 | + int8_t level; | |
| 979 | +} __attribute__ ((packed)) read_transmit_power_level_rp; | |
| 980 | +#define READ_TRANSMIT_POWER_LEVEL_RP_SIZE 4 | |
| 981 | + | |
| 982 | +#define OCF_HOST_BUFFER_SIZE 0x0033 | |
| 983 | +typedef struct { | |
| 984 | + uint16_t acl_mtu; | |
| 985 | + uint8_t sco_mtu; | |
| 986 | + uint16_t acl_max_pkt; | |
| 987 | + uint16_t sco_max_pkt; | |
| 988 | +} __attribute__ ((packed)) host_buffer_size_cp; | |
| 989 | +#define HOST_BUFFER_SIZE_CP_SIZE 7 | |
| 990 | + | |
| 991 | +#define OCF_HOST_NUMBER_OF_COMPLETED_PACKETS 0x0035 | |
| 992 | + | |
| 993 | +#define OCF_READ_LINK_SUPERVISION_TIMEOUT 0x0036 | |
| 994 | +typedef struct { | |
| 995 | + uint8_t status; | |
| 996 | + uint16_t handle; | |
| 997 | + uint16_t link_sup_to; | |
| 998 | +} __attribute__ ((packed)) read_link_supervision_timeout_rp; | |
| 999 | +#define READ_LINK_SUPERVISION_TIMEOUT_RP_SIZE 5 | |
| 1000 | + | |
| 1001 | +#define OCF_WRITE_LINK_SUPERVISION_TIMEOUT 0x0037 | |
| 1002 | +typedef struct { | |
| 1003 | + uint16_t handle; | |
| 1004 | + uint16_t link_sup_to; | |
| 1005 | +} __attribute__ ((packed)) write_link_supervision_timeout_cp; | |
| 1006 | +#define WRITE_LINK_SUPERVISION_TIMEOUT_CP_SIZE 4 | |
| 1007 | +typedef struct { | |
| 1008 | + uint8_t status; | |
| 1009 | + uint16_t handle; | |
| 1010 | +} __attribute__ ((packed)) write_link_supervision_timeout_rp; | |
| 1011 | +#define WRITE_LINK_SUPERVISION_TIMEOUT_RP_SIZE 3 | |
| 1012 | + | |
| 1013 | +#define OCF_READ_NUM_SUPPORTED_IAC 0x0038 | |
| 1014 | + | |
| 1015 | +#define MAX_IAC_LAP 0x40 | |
| 1016 | +#define OCF_READ_CURRENT_IAC_LAP 0x0039 | |
| 1017 | +typedef struct { | |
| 1018 | + uint8_t status; | |
| 1019 | + uint8_t num_current_iac; | |
| 1020 | + uint8_t lap[MAX_IAC_LAP][3]; | |
| 1021 | +} __attribute__ ((packed)) read_current_iac_lap_rp; | |
| 1022 | +#define READ_CURRENT_IAC_LAP_RP_SIZE 2+3*MAX_IAC_LAP | |
| 1023 | + | |
| 1024 | +#define OCF_WRITE_CURRENT_IAC_LAP 0x003A | |
| 1025 | +typedef struct { | |
| 1026 | + uint8_t num_current_iac; | |
| 1027 | + uint8_t lap[MAX_IAC_LAP][3]; | |
| 1028 | +} __attribute__ ((packed)) write_current_iac_lap_cp; | |
| 1029 | +#define WRITE_CURRENT_IAC_LAP_CP_SIZE 1+3*MAX_IAC_LAP | |
| 1030 | + | |
| 1031 | +#define OCF_READ_PAGE_SCAN_PERIOD_MODE 0x003B | |
| 1032 | + | |
| 1033 | +#define OCF_WRITE_PAGE_SCAN_PERIOD_MODE 0x003C | |
| 1034 | + | |
| 1035 | +#define OCF_READ_PAGE_SCAN_MODE 0x003D | |
| 1036 | + | |
| 1037 | +#define OCF_WRITE_PAGE_SCAN_MODE 0x003E | |
| 1038 | + | |
| 1039 | +#define OCF_SET_AFH_CLASSIFICATION 0x003F | |
| 1040 | +typedef struct { | |
| 1041 | + uint8_t map[10]; | |
| 1042 | +} __attribute__ ((packed)) set_afh_classification_cp; | |
| 1043 | +#define SET_AFH_CLASSIFICATION_CP_SIZE 10 | |
| 1044 | +typedef struct { | |
| 1045 | + uint8_t status; | |
| 1046 | +} __attribute__ ((packed)) set_afh_classification_rp; | |
| 1047 | +#define SET_AFH_CLASSIFICATION_RP_SIZE 1 | |
| 1048 | + | |
| 1049 | +#define OCF_READ_INQUIRY_SCAN_TYPE 0x0042 | |
| 1050 | +typedef struct { | |
| 1051 | + uint8_t status; | |
| 1052 | + uint8_t type; | |
| 1053 | +} __attribute__ ((packed)) read_inquiry_scan_type_rp; | |
| 1054 | +#define READ_INQUIRY_SCAN_TYPE_RP_SIZE 2 | |
| 1055 | + | |
| 1056 | +#define OCF_WRITE_INQUIRY_SCAN_TYPE 0x0043 | |
| 1057 | +typedef struct { | |
| 1058 | + uint8_t type; | |
| 1059 | +} __attribute__ ((packed)) write_inquiry_scan_type_cp; | |
| 1060 | +#define WRITE_INQUIRY_SCAN_TYPE_CP_SIZE 1 | |
| 1061 | +typedef struct { | |
| 1062 | + uint8_t status; | |
| 1063 | +} __attribute__ ((packed)) write_inquiry_scan_type_rp; | |
| 1064 | +#define WRITE_INQUIRY_SCAN_TYPE_RP_SIZE 1 | |
| 1065 | + | |
| 1066 | +#define OCF_READ_INQUIRY_MODE 0x0044 | |
| 1067 | +typedef struct { | |
| 1068 | + uint8_t status; | |
| 1069 | + uint8_t mode; | |
| 1070 | +} __attribute__ ((packed)) read_inquiry_mode_rp; | |
| 1071 | +#define READ_INQUIRY_MODE_RP_SIZE 2 | |
| 1072 | + | |
| 1073 | +#define OCF_WRITE_INQUIRY_MODE 0x0045 | |
| 1074 | +typedef struct { | |
| 1075 | + uint8_t mode; | |
| 1076 | +} __attribute__ ((packed)) write_inquiry_mode_cp; | |
| 1077 | +#define WRITE_INQUIRY_MODE_CP_SIZE 1 | |
| 1078 | +typedef struct { | |
| 1079 | + uint8_t status; | |
| 1080 | +} __attribute__ ((packed)) write_inquiry_mode_rp; | |
| 1081 | +#define WRITE_INQUIRY_MODE_RP_SIZE 1 | |
| 1082 | + | |
| 1083 | +#define OCF_READ_PAGE_SCAN_TYPE 0x0046 | |
| 1084 | + | |
| 1085 | +#define OCF_WRITE_PAGE_SCAN_TYPE 0x0047 | |
| 1086 | + | |
| 1087 | +#define OCF_READ_AFH_MODE 0x0048 | |
| 1088 | +typedef struct { | |
| 1089 | + uint8_t status; | |
| 1090 | + uint8_t mode; | |
| 1091 | +} __attribute__ ((packed)) read_afh_mode_rp; | |
| 1092 | +#define READ_AFH_MODE_RP_SIZE 2 | |
| 1093 | + | |
| 1094 | +#define OCF_WRITE_AFH_MODE 0x0049 | |
| 1095 | +typedef struct { | |
| 1096 | + uint8_t mode; | |
| 1097 | +} __attribute__ ((packed)) write_afh_mode_cp; | |
| 1098 | +#define WRITE_AFH_MODE_CP_SIZE 1 | |
| 1099 | +typedef struct { | |
| 1100 | + uint8_t status; | |
| 1101 | +} __attribute__ ((packed)) write_afh_mode_rp; | |
| 1102 | +#define WRITE_AFH_MODE_RP_SIZE 1 | |
| 1103 | + | |
| 1104 | +#define OCF_READ_EXT_INQUIRY_RESPONSE 0x0051 | |
| 1105 | +typedef struct { | |
| 1106 | + uint8_t status; | |
| 1107 | + uint8_t fec; | |
| 1108 | + uint8_t data[240]; | |
| 1109 | +} __attribute__ ((packed)) read_ext_inquiry_response_rp; | |
| 1110 | +#define READ_EXT_INQUIRY_RESPONSE_RP_SIZE 242 | |
| 1111 | + | |
| 1112 | +#define OCF_WRITE_EXT_INQUIRY_RESPONSE 0x0052 | |
| 1113 | +typedef struct { | |
| 1114 | + uint8_t fec; | |
| 1115 | + uint8_t data[240]; | |
| 1116 | +} __attribute__ ((packed)) write_ext_inquiry_response_cp; | |
| 1117 | +#define WRITE_EXT_INQUIRY_RESPONSE_CP_SIZE 241 | |
| 1118 | +typedef struct { | |
| 1119 | + uint8_t status; | |
| 1120 | +} __attribute__ ((packed)) write_ext_inquiry_response_rp; | |
| 1121 | +#define WRITE_EXT_INQUIRY_RESPONSE_RP_SIZE 1 | |
| 1122 | + | |
| 1123 | +/* Informational Parameters */ | |
| 1124 | +#define OGF_INFO_PARAM 0x04 | |
| 1125 | + | |
| 1126 | +#define OCF_READ_LOCAL_VERSION 0x0001 | |
| 1127 | +typedef struct { | |
| 1128 | + uint8_t status; | |
| 1129 | + uint8_t hci_ver; | |
| 1130 | + uint16_t hci_rev; | |
| 1131 | + uint8_t lmp_ver; | |
| 1132 | + uint16_t manufacturer; | |
| 1133 | + uint16_t lmp_subver; | |
| 1134 | +} __attribute__ ((packed)) read_local_version_rp; | |
| 1135 | +#define READ_LOCAL_VERSION_RP_SIZE 9 | |
| 1136 | + | |
| 1137 | +#define OCF_READ_LOCAL_COMMANDS 0x0002 | |
| 1138 | +typedef struct { | |
| 1139 | + uint8_t status; | |
| 1140 | + uint8_t commands[64]; | |
| 1141 | +} __attribute__ ((packed)) read_local_commands_rp; | |
| 1142 | +#define READ_LOCAL_COMMANDS_RP_SIZE 65 | |
| 1143 | + | |
| 1144 | +#define OCF_READ_LOCAL_FEATURES 0x0003 | |
| 1145 | +typedef struct { | |
| 1146 | + uint8_t status; | |
| 1147 | + uint8_t features[8]; | |
| 1148 | +} __attribute__ ((packed)) read_local_features_rp; | |
| 1149 | +#define READ_LOCAL_FEATURES_RP_SIZE 9 | |
| 1150 | + | |
| 1151 | +#define OCF_READ_LOCAL_EXT_FEATURES 0x0004 | |
| 1152 | +typedef struct { | |
| 1153 | + uint8_t page_num; | |
| 1154 | +} __attribute__ ((packed)) read_local_ext_features_cp; | |
| 1155 | +#define READ_LOCAL_EXT_FEATURES_CP_SIZE 1 | |
| 1156 | +typedef struct { | |
| 1157 | + uint8_t status; | |
| 1158 | + uint8_t page_num; | |
| 1159 | + uint8_t max_page_num; | |
| 1160 | + uint8_t features[8]; | |
| 1161 | +} __attribute__ ((packed)) read_local_ext_features_rp; | |
| 1162 | +#define READ_LOCAL_EXT_FEATURES_RP_SIZE 11 | |
| 1163 | + | |
| 1164 | +#define OCF_READ_BUFFER_SIZE 0x0005 | |
| 1165 | +typedef struct { | |
| 1166 | + uint8_t status; | |
| 1167 | + uint16_t acl_mtu; | |
| 1168 | + uint8_t sco_mtu; | |
| 1169 | + uint16_t acl_max_pkt; | |
| 1170 | + uint16_t sco_max_pkt; | |
| 1171 | +} __attribute__ ((packed)) read_buffer_size_rp; | |
| 1172 | +#define READ_BUFFER_SIZE_RP_SIZE 8 | |
| 1173 | + | |
| 1174 | +#define OCF_READ_COUNTRY_CODE 0x0007 | |
| 1175 | +typedef struct { | |
| 1176 | + uint8_t status; | |
| 1177 | + uint8_t country_code; | |
| 1178 | +} __attribute__ ((packed)) read_country_code_rp; | |
| 1179 | +#define READ_COUNTRY_CODE_RP_SIZE 2 | |
| 1180 | + | |
| 1181 | +#define OCF_READ_BD_ADDR 0x0009 | |
| 1182 | +typedef struct { | |
| 1183 | + uint8_t status; | |
| 1184 | + bdaddr_t bdaddr; | |
| 1185 | +} __attribute__ ((packed)) read_bd_addr_rp; | |
| 1186 | +#define READ_BD_ADDR_RP_SIZE 7 | |
| 1187 | + | |
| 1188 | +/* Status params */ | |
| 1189 | +#define OGF_STATUS_PARAM 0x05 | |
| 1190 | + | |
| 1191 | +#define OCF_READ_FAILED_CONTACT_COUNTER 0x0001 | |
| 1192 | +typedef struct { | |
| 1193 | + uint8_t status; | |
| 1194 | + uint16_t handle; | |
| 1195 | + uint8_t counter; | |
| 1196 | +} __attribute__ ((packed)) read_failed_contact_counter_rp; | |
| 1197 | +#define READ_FAILED_CONTACT_COUNTER_RP_SIZE 4 | |
| 1198 | + | |
| 1199 | +#define OCF_RESET_FAILED_CONTACT_COUNTER 0x0002 | |
| 1200 | +typedef struct { | |
| 1201 | + uint8_t status; | |
| 1202 | + uint16_t handle; | |
| 1203 | +} __attribute__ ((packed)) reset_failed_contact_counter_rp; | |
| 1204 | +#define RESET_FAILED_CONTACT_COUNTER_RP_SIZE 4 | |
| 1205 | + | |
| 1206 | +#define OCF_READ_LINK_QUALITY 0x0003 | |
| 1207 | +typedef struct { | |
| 1208 | + uint16_t handle; | |
| 1209 | +} __attribute__ ((packed)) read_link_quality_cp; | |
| 1210 | +#define READ_LINK_QUALITY_CP_SIZE 4 | |
| 1211 | + | |
| 1212 | +typedef struct { | |
| 1213 | + uint8_t status; | |
| 1214 | + uint16_t handle; | |
| 1215 | + uint8_t link_quality; | |
| 1216 | +} __attribute__ ((packed)) read_link_quality_rp; | |
| 1217 | +#define READ_LINK_QUALITY_RP_SIZE 4 | |
| 1218 | + | |
| 1219 | +#define OCF_READ_RSSI 0x0005 | |
| 1220 | +typedef struct { | |
| 1221 | + uint8_t status; | |
| 1222 | + uint16_t handle; | |
| 1223 | + int8_t rssi; | |
| 1224 | +} __attribute__ ((packed)) read_rssi_rp; | |
| 1225 | +#define READ_RSSI_RP_SIZE 4 | |
| 1226 | + | |
| 1227 | +#define OCF_READ_AFH_MAP 0x0006 | |
| 1228 | +typedef struct { | |
| 1229 | + uint8_t status; | |
| 1230 | + uint16_t handle; | |
| 1231 | + uint8_t mode; | |
| 1232 | + uint8_t map[10]; | |
| 1233 | +} __attribute__ ((packed)) read_afh_map_rp; | |
| 1234 | +#define READ_AFH_MAP_RP_SIZE 14 | |
| 1235 | + | |
| 1236 | +#define OCF_READ_CLOCK 0x0007 | |
| 1237 | +typedef struct { | |
| 1238 | + uint16_t handle; | |
| 1239 | + uint8_t which_clock; | |
| 1240 | +} __attribute__ ((packed)) read_clock_cp; | |
| 1241 | +#define READ_CLOCK_CP_SIZE 3 | |
| 1242 | +typedef struct { | |
| 1243 | + uint8_t status; | |
| 1244 | + uint16_t handle; | |
| 1245 | + uint32_t clock; | |
| 1246 | + uint16_t accuracy; | |
| 1247 | +} __attribute__ ((packed)) read_clock_rp; | |
| 1248 | +#define READ_CLOCK_RP_SIZE 9 | |
| 1249 | + | |
| 1250 | +/* Testing commands */ | |
| 1251 | +#define OGF_TESTING_CMD 0x3e | |
| 1252 | + | |
| 1253 | +/* Vendor specific commands */ | |
| 1254 | +#define OGF_VENDOR_CMD 0x3f | |
| 1255 | + | |
| 1256 | +/* HCI Events */ | |
| 1257 | + | |
| 1258 | +#define EVT_INQUIRY_COMPLETE 0x01 | |
| 1259 | + | |
| 1260 | +#define EVT_INQUIRY_RESULT 0x02 | |
| 1261 | +typedef struct { | |
| 1262 | + uint8_t num_responses; | |
| 1263 | + bdaddr_t bdaddr; | |
| 1264 | + uint8_t pscan_rep_mode; | |
| 1265 | + uint8_t pscan_period_mode; | |
| 1266 | + uint8_t pscan_mode; | |
| 1267 | + uint8_t dev_class[3]; | |
| 1268 | + uint16_t clock_offset; | |
| 1269 | +} __attribute__ ((packed)) inquiry_info; | |
| 1270 | +#define INQUIRY_INFO_SIZE 14 | |
| 1271 | + | |
| 1272 | +#define EVT_CONN_COMPLETE 0x03 | |
| 1273 | +typedef struct { | |
| 1274 | + uint8_t status; | |
| 1275 | + uint16_t handle; | |
| 1276 | + bdaddr_t bdaddr; | |
| 1277 | + uint8_t link_type; | |
| 1278 | + uint8_t encr_mode; | |
| 1279 | +} __attribute__ ((packed)) evt_conn_complete; | |
| 1280 | +#define EVT_CONN_COMPLETE_SIZE 11 | |
| 1281 | + | |
| 1282 | +#define EVT_CONN_REQUEST 0x04 | |
| 1283 | +typedef struct { | |
| 1284 | + bdaddr_t bdaddr; | |
| 1285 | + uint8_t dev_class[3]; | |
| 1286 | + uint8_t link_type; | |
| 1287 | +} __attribute__ ((packed)) evt_conn_request; | |
| 1288 | +#define EVT_CONN_REQUEST_SIZE 10 | |
| 1289 | + | |
| 1290 | +#define EVT_DISCONN_COMPLETE 0x05 | |
| 1291 | +typedef struct { | |
| 1292 | + uint8_t status; | |
| 1293 | + uint16_t handle; | |
| 1294 | + uint8_t reason; | |
| 1295 | +} __attribute__ ((packed)) evt_disconn_complete; | |
| 1296 | +#define EVT_DISCONN_COMPLETE_SIZE 4 | |
| 1297 | + | |
| 1298 | +#define EVT_AUTH_COMPLETE 0x06 | |
| 1299 | +typedef struct { | |
| 1300 | + uint8_t status; | |
| 1301 | + uint16_t handle; | |
| 1302 | +} __attribute__ ((packed)) evt_auth_complete; | |
| 1303 | +#define EVT_AUTH_COMPLETE_SIZE 3 | |
| 1304 | + | |
| 1305 | +#define EVT_REMOTE_NAME_REQ_COMPLETE 0x07 | |
| 1306 | +typedef struct { | |
| 1307 | + uint8_t status; | |
| 1308 | + bdaddr_t bdaddr; | |
| 1309 | + char name[248]; | |
| 1310 | +} __attribute__ ((packed)) evt_remote_name_req_complete; | |
| 1311 | +#define EVT_REMOTE_NAME_REQ_COMPLETE_SIZE 255 | |
| 1312 | + | |
| 1313 | +#define EVT_ENCRYPT_CHANGE 0x08 | |
| 1314 | +typedef struct { | |
| 1315 | + uint8_t status; | |
| 1316 | + uint16_t handle; | |
| 1317 | + uint8_t encrypt; | |
| 1318 | +} __attribute__ ((packed)) evt_encrypt_change; | |
| 1319 | +#define EVT_ENCRYPT_CHANGE_SIZE 5 | |
| 1320 | + | |
| 1321 | +#define EVT_CHANGE_CONN_LINK_KEY_COMPLETE 0x09 | |
| 1322 | +typedef struct { | |
| 1323 | + uint8_t status; | |
| 1324 | + uint16_t handle; | |
| 1325 | +} __attribute__ ((packed)) evt_change_conn_link_key_complete; | |
| 1326 | +#define EVT_CHANGE_CONN_LINK_KEY_COMPLETE_SIZE 3 | |
| 1327 | + | |
| 1328 | +#define EVT_MASTER_LINK_KEY_COMPLETE 0x0A | |
| 1329 | +typedef struct { | |
| 1330 | + uint8_t status; | |
| 1331 | + uint16_t handle; | |
| 1332 | + uint8_t key_flag; | |
| 1333 | +} __attribute__ ((packed)) evt_master_link_key_complete; | |
| 1334 | +#define EVT_MASTER_LINK_KEY_COMPLETE_SIZE 4 | |
| 1335 | + | |
| 1336 | +#define EVT_READ_REMOTE_FEATURES_COMPLETE 0x0B | |
| 1337 | +typedef struct { | |
| 1338 | + uint8_t status; | |
| 1339 | + uint16_t handle; | |
| 1340 | + uint8_t features[8]; | |
| 1341 | +} __attribute__ ((packed)) evt_read_remote_features_complete; | |
| 1342 | +#define EVT_READ_REMOTE_FEATURES_COMPLETE_SIZE 11 | |
| 1343 | + | |
| 1344 | +#define EVT_READ_REMOTE_VERSION_COMPLETE 0x0C | |
| 1345 | +typedef struct { | |
| 1346 | + uint8_t status; | |
| 1347 | + uint16_t handle; | |
| 1348 | + uint8_t lmp_ver; | |
| 1349 | + uint16_t manufacturer; | |
| 1350 | + uint16_t lmp_subver; | |
| 1351 | +} __attribute__ ((packed)) evt_read_remote_version_complete; | |
| 1352 | +#define EVT_READ_REMOTE_VERSION_COMPLETE_SIZE 8 | |
| 1353 | + | |
| 1354 | +#define EVT_QOS_SETUP_COMPLETE 0x0D | |
| 1355 | +typedef struct { | |
| 1356 | + uint8_t status; | |
| 1357 | + uint16_t handle; | |
| 1358 | + uint8_t flags; /* Reserved */ | |
| 1359 | + hci_qos qos; | |
| 1360 | +} __attribute__ ((packed)) evt_qos_setup_complete; | |
| 1361 | +#define EVT_QOS_SETUP_COMPLETE_SIZE (4 + HCI_QOS_CP_SIZE) | |
| 1362 | + | |
| 1363 | +#define EVT_CMD_COMPLETE 0x0E | |
| 1364 | +typedef struct { | |
| 1365 | + uint8_t ncmd; | |
| 1366 | + uint16_t opcode; | |
| 1367 | +} __attribute__ ((packed)) evt_cmd_complete; | |
| 1368 | +#define EVT_CMD_COMPLETE_SIZE 3 | |
| 1369 | + | |
| 1370 | +#define EVT_CMD_STATUS 0x0F | |
| 1371 | +typedef struct { | |
| 1372 | + uint8_t status; | |
| 1373 | + uint8_t ncmd; | |
| 1374 | + uint16_t opcode; | |
| 1375 | +} __attribute__ ((packed)) evt_cmd_status; | |
| 1376 | +#define EVT_CMD_STATUS_SIZE 4 | |
| 1377 | + | |
| 1378 | +#define EVT_HARDWARE_ERROR 0x10 | |
| 1379 | +typedef struct { | |
| 1380 | + uint8_t code; | |
| 1381 | +} __attribute__ ((packed)) evt_hardware_error; | |
| 1382 | +#define EVT_HARDWARE_ERROR_SIZE 1 | |
| 1383 | + | |
| 1384 | +#define EVT_FLUSH_OCCURRED 0x11 | |
| 1385 | +typedef struct { | |
| 1386 | + uint16_t handle; | |
| 1387 | +} __attribute__ ((packed)) evt_flush_occured; | |
| 1388 | +#define EVT_FLUSH_OCCURRED_SIZE 2 | |
| 1389 | + | |
| 1390 | +#define EVT_ROLE_CHANGE 0x12 | |
| 1391 | +typedef struct { | |
| 1392 | + uint8_t status; | |
| 1393 | + bdaddr_t bdaddr; | |
| 1394 | + uint8_t role; | |
| 1395 | +} __attribute__ ((packed)) evt_role_change; | |
| 1396 | +#define EVT_ROLE_CHANGE_SIZE 8 | |
| 1397 | + | |
| 1398 | +#define EVT_NUM_COMP_PKTS 0x13 | |
| 1399 | +typedef struct { | |
| 1400 | + uint8_t num_hndl; | |
| 1401 | + struct { | |
| 1402 | + uint16_t handle; | |
| 1403 | + uint16_t num_packets; | |
| 1404 | + } connection[0]; | |
| 1405 | +} __attribute__ ((packed)) evt_num_comp_pkts; | |
| 1406 | +#define EVT_NUM_COMP_PKTS_SIZE(num_hndl) (1 + 4 * (num_hndl)) | |
| 1407 | + | |
| 1408 | +#define EVT_MODE_CHANGE 0x14 | |
| 1409 | +typedef struct { | |
| 1410 | + uint8_t status; | |
| 1411 | + uint16_t handle; | |
| 1412 | + uint8_t mode; | |
| 1413 | + uint16_t interval; | |
| 1414 | +} __attribute__ ((packed)) evt_mode_change; | |
| 1415 | +#define EVT_MODE_CHANGE_SIZE 6 | |
| 1416 | + | |
| 1417 | +#define EVT_RETURN_LINK_KEYS 0x15 | |
| 1418 | +typedef struct { | |
| 1419 | + uint8_t num_keys; | |
| 1420 | + /* variable length part */ | |
| 1421 | +} __attribute__ ((packed)) evt_return_link_keys; | |
| 1422 | +#define EVT_RETURN_LINK_KEYS_SIZE 1 | |
| 1423 | + | |
| 1424 | +#define EVT_PIN_CODE_REQ 0x16 | |
| 1425 | +typedef struct { | |
| 1426 | + bdaddr_t bdaddr; | |
| 1427 | +} __attribute__ ((packed)) evt_pin_code_req; | |
| 1428 | +#define EVT_PIN_CODE_REQ_SIZE 6 | |
| 1429 | + | |
| 1430 | +#define EVT_LINK_KEY_REQ 0x17 | |
| 1431 | +typedef struct { | |
| 1432 | + bdaddr_t bdaddr; | |
| 1433 | +} __attribute__ ((packed)) evt_link_key_req; | |
| 1434 | +#define EVT_LINK_KEY_REQ_SIZE 6 | |
| 1435 | + | |
| 1436 | +#define EVT_LINK_KEY_NOTIFY 0x18 | |
| 1437 | +typedef struct { | |
| 1438 | + bdaddr_t bdaddr; | |
| 1439 | + uint8_t link_key[16]; | |
| 1440 | + uint8_t key_type; | |
| 1441 | +} __attribute__ ((packed)) evt_link_key_notify; | |
| 1442 | +#define EVT_LINK_KEY_NOTIFY_SIZE 23 | |
| 1443 | + | |
| 1444 | +#define EVT_LOOPBACK_COMMAND 0x19 | |
| 1445 | + | |
| 1446 | +#define EVT_DATA_BUFFER_OVERFLOW 0x1A | |
| 1447 | +typedef struct { | |
| 1448 | + uint8_t link_type; | |
| 1449 | +} __attribute__ ((packed)) evt_data_buffer_overflow; | |
| 1450 | +#define EVT_DATA_BUFFER_OVERFLOW_SIZE 1 | |
| 1451 | + | |
| 1452 | +#define EVT_MAX_SLOTS_CHANGE 0x1B | |
| 1453 | +typedef struct { | |
| 1454 | + uint16_t handle; | |
| 1455 | + uint8_t max_slots; | |
| 1456 | +} __attribute__ ((packed)) evt_max_slots_change; | |
| 1457 | +#define EVT_MAX_SLOTS_CHANGE_SIZE 3 | |
| 1458 | + | |
| 1459 | +#define EVT_READ_CLOCK_OFFSET_COMPLETE 0x1C | |
| 1460 | +typedef struct { | |
| 1461 | + uint8_t status; | |
| 1462 | + uint16_t handle; | |
| 1463 | + uint16_t clock_offset; | |
| 1464 | +} __attribute__ ((packed)) evt_read_clock_offset_complete; | |
| 1465 | +#define EVT_READ_CLOCK_OFFSET_COMPLETE_SIZE 5 | |
| 1466 | + | |
| 1467 | +#define EVT_CONN_PTYPE_CHANGED 0x1D | |
| 1468 | +typedef struct { | |
| 1469 | + uint8_t status; | |
| 1470 | + uint16_t handle; | |
| 1471 | + uint16_t ptype; | |
| 1472 | +} __attribute__ ((packed)) evt_conn_ptype_changed; | |
| 1473 | +#define EVT_CONN_PTYPE_CHANGED_SIZE 5 | |
| 1474 | + | |
| 1475 | +#define EVT_QOS_VIOLATION 0x1E | |
| 1476 | +typedef struct { | |
| 1477 | + uint16_t handle; | |
| 1478 | +} __attribute__ ((packed)) evt_qos_violation; | |
| 1479 | +#define EVT_QOS_VIOLATION_SIZE 2 | |
| 1480 | + | |
| 1481 | +#define EVT_PSCAN_REP_MODE_CHANGE 0x20 | |
| 1482 | +typedef struct { | |
| 1483 | + bdaddr_t bdaddr; | |
| 1484 | + uint8_t pscan_rep_mode; | |
| 1485 | +} __attribute__ ((packed)) evt_pscan_rep_mode_change; | |
| 1486 | +#define EVT_PSCAN_REP_MODE_CHANGE_SIZE 7 | |
| 1487 | + | |
| 1488 | +#define EVT_FLOW_SPEC_COMPLETE 0x21 | |
| 1489 | +typedef struct { | |
| 1490 | + uint8_t status; | |
| 1491 | + uint16_t handle; | |
| 1492 | + uint8_t flags; | |
| 1493 | + uint8_t direction; | |
| 1494 | + hci_qos qos; | |
| 1495 | +} __attribute__ ((packed)) evt_flow_spec_complete; | |
| 1496 | +#define EVT_FLOW_SPEC_COMPLETE_SIZE (5 + HCI_QOS_CP_SIZE) | |
| 1497 | + | |
| 1498 | +#define EVT_INQUIRY_RESULT_WITH_RSSI 0x22 | |
| 1499 | +typedef struct { | |
| 1500 | + uint8_t num_responses; | |
| 1501 | + bdaddr_t bdaddr; | |
| 1502 | + uint8_t pscan_rep_mode; | |
| 1503 | + uint8_t pscan_period_mode; | |
| 1504 | + uint8_t dev_class[3]; | |
| 1505 | + uint16_t clock_offset; | |
| 1506 | + int8_t rssi; | |
| 1507 | +} __attribute__ ((packed)) inquiry_info_with_rssi; | |
| 1508 | +#define INQUIRY_INFO_WITH_RSSI_SIZE 15 | |
| 1509 | +typedef struct { | |
| 1510 | + uint8_t num_responses; | |
| 1511 | + bdaddr_t bdaddr; | |
| 1512 | + uint8_t pscan_rep_mode; | |
| 1513 | + uint8_t pscan_period_mode; | |
| 1514 | + uint8_t pscan_mode; | |
| 1515 | + uint8_t dev_class[3]; | |
| 1516 | + uint16_t clock_offset; | |
| 1517 | + int8_t rssi; | |
| 1518 | +} __attribute__ ((packed)) inquiry_info_with_rssi_and_pscan_mode; | |
| 1519 | +#define INQUIRY_INFO_WITH_RSSI_AND_PSCAN_MODE_SIZE 16 | |
| 1520 | + | |
| 1521 | +#define EVT_READ_REMOTE_EXT_FEATURES_COMPLETE 0x23 | |
| 1522 | +typedef struct { | |
| 1523 | + uint8_t status; | |
| 1524 | + uint16_t handle; | |
| 1525 | + uint8_t page_num; | |
| 1526 | + uint8_t max_page_num; | |
| 1527 | + uint8_t features[8]; | |
| 1528 | +} __attribute__ ((packed)) evt_read_remote_ext_features_complete; | |
| 1529 | +#define EVT_READ_REMOTE_EXT_FEATURES_COMPLETE_SIZE 13 | |
| 1530 | + | |
| 1531 | +#define EVT_SYNC_CONN_COMPLETE 0x2C | |
| 1532 | +typedef struct { | |
| 1533 | + uint8_t status; | |
| 1534 | + uint16_t handle; | |
| 1535 | + bdaddr_t bdaddr; | |
| 1536 | + uint8_t link_type; | |
| 1537 | + uint8_t trans_interval; | |
| 1538 | + uint8_t retrans_window; | |
| 1539 | + uint16_t rx_pkt_len; | |
| 1540 | + uint16_t tx_pkt_len; | |
| 1541 | + uint8_t air_mode; | |
| 1542 | +} __attribute__ ((packed)) evt_sync_conn_complete; | |
| 1543 | +#define EVT_SYNC_CONN_COMPLETE_SIZE 17 | |
| 1544 | + | |
| 1545 | +#define EVT_SYNC_CONN_CHANGED 0x2D | |
| 1546 | +typedef struct { | |
| 1547 | + uint8_t status; | |
| 1548 | + uint16_t handle; | |
| 1549 | + uint8_t trans_interval; | |
| 1550 | + uint8_t retrans_window; | |
| 1551 | + uint16_t rx_pkt_len; | |
| 1552 | + uint16_t tx_pkt_len; | |
| 1553 | +} __attribute__ ((packed)) evt_sync_conn_changed; | |
| 1554 | +#define EVT_SYNC_CONN_CHANGED_SIZE 9 | |
| 1555 | + | |
| 1556 | +#define EVT_SNIFF_SUBRATE 0x2E | |
| 1557 | +typedef struct { | |
| 1558 | + uint8_t status; | |
| 1559 | + uint16_t handle; | |
| 1560 | + uint16_t max_remote_latency; | |
| 1561 | + uint16_t max_local_latency; | |
| 1562 | + uint16_t min_remote_timeout; | |
| 1563 | + uint16_t min_local_timeout; | |
| 1564 | +} __attribute__ ((packed)) evt_sniff_subrate; | |
| 1565 | +#define EVT_SNIFF_SUBRATE_SIZE 11 | |
| 1566 | + | |
| 1567 | +#define EVT_EXTENDED_INQUIRY_RESULT 0x2F | |
| 1568 | +typedef struct { | |
| 1569 | + bdaddr_t bdaddr; | |
| 1570 | + uint8_t pscan_rep_mode; | |
| 1571 | + uint8_t pscan_period_mode; | |
| 1572 | + uint8_t dev_class[3]; | |
| 1573 | + uint16_t clock_offset; | |
| 1574 | + int8_t rssi; | |
| 1575 | + uint8_t data[240]; | |
| 1576 | +} __attribute__ ((packed)) extended_inquiry_info; | |
| 1577 | +#define EXTENDED_INQUIRY_INFO_SIZE 254 | |
| 1578 | + | |
| 1579 | +#define EVT_TESTING 0xFE | |
| 1580 | + | |
| 1581 | +#define EVT_VENDOR 0xFF | |
| 1582 | + | |
| 1583 | +/* Command opcode pack/unpack */ | |
| 1584 | +#define cmd_opcode_pack(ogf, ocf) (uint16_t)((ocf & 0x03ff)|(ogf << 10)) | |
| 1585 | +#define cmd_opcode_ogf(op) (op >> 10) | |
| 1586 | +#define cmd_opcode_ocf(op) (op & 0x03ff) | |
| 1587 | + | |
| 1588 | +/* ACL handle and flags pack/unpack */ | |
| 1589 | +#define acl_handle_pack(h, f) (uint16_t)(((h) & 0x0fff)|((f) << 12)) | |
| 1590 | +#define acl_handle(h) ((h) & 0x0fff) | |
| 1591 | +#define acl_flags(h) ((h) >> 12) | |
| 1592 | + | |
| 1593 | +/* HCI Packet structures */ | |
| 1594 | +#define HCI_COMMAND_HDR_SIZE 3 | |
| 1595 | +#define HCI_EVENT_HDR_SIZE 2 | |
| 1596 | +#define HCI_ACL_HDR_SIZE 4 | |
| 1597 | +#define HCI_SCO_HDR_SIZE 3 | |
| 1598 | + | |
| 1599 | +struct hci_command_hdr { | |
| 1600 | + uint16_t opcode; /* OCF & OGF */ | |
| 1601 | + uint8_t plen; | |
| 1602 | +} __attribute__ ((packed)); | |
| 1603 | + | |
| 1604 | +struct hci_event_hdr { | |
| 1605 | + uint8_t evt; | |
| 1606 | + uint8_t plen; | |
| 1607 | +} __attribute__ ((packed)); | |
| 1608 | + | |
| 1609 | +struct hci_acl_hdr { | |
| 1610 | + uint16_t handle; /* Handle & Flags(PB, BC) */ | |
| 1611 | + uint16_t dlen; | |
| 1612 | +} __attribute__ ((packed)); | |
| 1613 | + | |
| 1614 | +struct hci_sco_hdr { | |
| 1615 | + uint16_t handle; | |
| 1616 | + uint8_t dlen; | |
| 1617 | +} __attribute__ ((packed)); | ... | ... |
hw/nseries.c
| ... | ... | @@ -741,6 +741,20 @@ static void n8x0_cbus_setup(struct n800_s *s) |
| 741 | 741 | cbus_attach(cbus, s->tahvo = tahvo_init(tahvo_irq, 1)); |
| 742 | 742 | } |
| 743 | 743 | |
| 744 | +static void n8x0_uart_setup(struct n800_s *s) | |
| 745 | +{ | |
| 746 | + CharDriverState *radio = uart_hci_init( | |
| 747 | + omap2_gpio_in_get(s->cpu->gpif, | |
| 748 | + N8X0_BT_HOST_WKUP_GPIO)[0]); | |
| 749 | + | |
| 750 | + omap2_gpio_out_set(s->cpu->gpif, N8X0_BT_RESET_GPIO, | |
| 751 | + csrhci_pins_get(radio)[csrhci_pin_reset]); | |
| 752 | + omap2_gpio_out_set(s->cpu->gpif, N8X0_BT_WKUP_GPIO, | |
| 753 | + csrhci_pins_get(radio)[csrhci_pin_wakeup]); | |
| 754 | + | |
| 755 | + omap_uart_attach(s->cpu->uart[BT_UART], radio); | |
| 756 | +} | |
| 757 | + | |
| 744 | 758 | static void n8x0_usb_power_cb(void *opaque, int line, int level) |
| 745 | 759 | { |
| 746 | 760 | struct n800_s *s = opaque; |
| ... | ... | @@ -1306,6 +1320,7 @@ static void n8x0_init(ram_addr_t ram_size, const char *boot_device, |
| 1306 | 1320 | n8x0_spi_setup(s); |
| 1307 | 1321 | n8x0_dss_setup(s, ds); |
| 1308 | 1322 | n8x0_cbus_setup(s); |
| 1323 | + n8x0_uart_setup(s); | |
| 1309 | 1324 | if (usb_enabled) |
| 1310 | 1325 | n8x0_usb_setup(s); |
| 1311 | 1326 | ... | ... |