gwj / at91sam9263 · Commits

Commit 585c88d5af67be5bf74a557b5365bb91a998de7b

Authored by aurel32
1 parent c407df81

target-mips: optimize gen_flt3_ldst() 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7126 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 4 additions and 4 deletions
target-mips/translate.c
  View file @585c88d
... ... @@ -7221,7 +7221,6 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
7221 7221 const char *opn = "extended float load/store";
7222 7222 int store = 0;
7223 7223 TCGv t0 = tcg_temp_new();
7224   - TCGv t1 = tcg_temp_new();
7225 7224  
7226 7225 if (base == 0) {
7227 7226 gen_load_gpr(t0, index);
... ... @@ -7240,8 +7239,8 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
7240 7239 {
7241 7240 TCGv_i32 fp0 = tcg_temp_new_i32();
7242 7241  
7243   - tcg_gen_qemu_ld32s(t1, t0, ctx->mem_idx);
7244   - tcg_gen_trunc_tl_i32(fp0, t1);
  7242 + tcg_gen_qemu_ld32s(t0, t0, ctx->mem_idx);
  7243 + tcg_gen_trunc_tl_i32(fp0, t0);
7245 7244 gen_store_fpr32(fp0, fd);
7246 7245 tcg_temp_free_i32(fp0);
7247 7246 }
... ... @@ -7275,11 +7274,13 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
7275 7274 check_cop1x(ctx);
7276 7275 {
7277 7276 TCGv_i32 fp0 = tcg_temp_new_i32();
  7277 + TCGv t1 = tcg_temp_new();
7278 7278  
7279 7279 gen_load_fpr32(fp0, fs);
7280 7280 tcg_gen_extu_i32_tl(t1, fp0);
7281 7281 tcg_gen_qemu_st32(t1, t0, ctx->mem_idx);
7282 7282 tcg_temp_free_i32(fp0);
  7283 + tcg_temp_free_i32(t1);
7283 7284 }
7284 7285 opn = "swxc1";
7285 7286 store = 1;
... ... @@ -7312,7 +7313,6 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
7312 7313 break;
7313 7314 }
7314 7315 tcg_temp_free(t0);
7315   - tcg_temp_free(t1);
7316 7316 MIPS_DEBUG("%s %s, %s(%s)", opn, fregnames[store ? fs : fd],
7317 7317 regnames[index], regnames[base]);
7318 7318 }
... ...