Commit 58565070ee887c9f7285e6d9e169179dddebdb53

Authored by ths
1 parent 57cd6e97

Delete more obsolete dyngen ops.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4372 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 0 additions and 115 deletions
target-mips/op_mem.c
@@ -18,61 +18,6 @@ @@ -18,61 +18,6 @@
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21 -/* Standard loads and stores */  
22 -void glue(op_lb, MEMSUFFIX) (void)  
23 -{  
24 - T0 = glue(ldsb, MEMSUFFIX)(T0);  
25 - FORCE_RET();  
26 -}  
27 -  
28 -void glue(op_lbu, MEMSUFFIX) (void)  
29 -{  
30 - T0 = glue(ldub, MEMSUFFIX)(T0);  
31 - FORCE_RET();  
32 -}  
33 -  
34 -void glue(op_sb, MEMSUFFIX) (void)  
35 -{  
36 - glue(stb, MEMSUFFIX)(T0, T1);  
37 - FORCE_RET();  
38 -}  
39 -  
40 -void glue(op_lh, MEMSUFFIX) (void)  
41 -{  
42 - T0 = glue(ldsw, MEMSUFFIX)(T0);  
43 - FORCE_RET();  
44 -}  
45 -  
46 -void glue(op_lhu, MEMSUFFIX) (void)  
47 -{  
48 - T0 = glue(lduw, MEMSUFFIX)(T0);  
49 - FORCE_RET();  
50 -}  
51 -  
52 -void glue(op_sh, MEMSUFFIX) (void)  
53 -{  
54 - glue(stw, MEMSUFFIX)(T0, T1);  
55 - FORCE_RET();  
56 -}  
57 -  
58 -void glue(op_lw, MEMSUFFIX) (void)  
59 -{  
60 - T0 = glue(ldl, MEMSUFFIX)(T0);  
61 - FORCE_RET();  
62 -}  
63 -  
64 -void glue(op_lwu, MEMSUFFIX) (void)  
65 -{  
66 - T0 = (uint32_t)glue(ldl, MEMSUFFIX)(T0);  
67 - FORCE_RET();  
68 -}  
69 -  
70 -void glue(op_sw, MEMSUFFIX) (void)  
71 -{  
72 - glue(stl, MEMSUFFIX)(T0, T1);  
73 - FORCE_RET();  
74 -}  
75 -  
76 /* "half" load and stores. We must do the memory access inline, 21 /* "half" load and stores. We must do the memory access inline,
77 or fault handling won't work. */ 22 or fault handling won't work. */
78 23
@@ -166,43 +111,7 @@ void glue(op_swr, MEMSUFFIX) (void) @@ -166,43 +111,7 @@ void glue(op_swr, MEMSUFFIX) (void)
166 FORCE_RET(); 111 FORCE_RET();
167 } 112 }
168 113
169 -void glue(op_ll, MEMSUFFIX) (void)  
170 -{  
171 - T1 = T0;  
172 - T0 = glue(ldl, MEMSUFFIX)(T0);  
173 - env->CP0_LLAddr = T1;  
174 - FORCE_RET();  
175 -}  
176 -  
177 -void glue(op_sc, MEMSUFFIX) (void)  
178 -{  
179 - CALL_FROM_TB0(dump_sc);  
180 - if (T0 & 0x3) {  
181 - env->CP0_BadVAddr = T0;  
182 - CALL_FROM_TB1(do_raise_exception, EXCP_AdES);  
183 - }  
184 - if (T0 == env->CP0_LLAddr) {  
185 - glue(stl, MEMSUFFIX)(T0, T1);  
186 - T0 = 1;  
187 - } else {  
188 - T0 = 0;  
189 - }  
190 - FORCE_RET();  
191 -}  
192 -  
193 #if defined(TARGET_MIPS64) 114 #if defined(TARGET_MIPS64)
194 -void glue(op_ld, MEMSUFFIX) (void)  
195 -{  
196 - T0 = glue(ldq, MEMSUFFIX)(T0);  
197 - FORCE_RET();  
198 -}  
199 -  
200 -void glue(op_sd, MEMSUFFIX) (void)  
201 -{  
202 - glue(stq, MEMSUFFIX)(T0, T1);  
203 - FORCE_RET();  
204 -}  
205 -  
206 /* "half" load and stores. We must do the memory access inline, 115 /* "half" load and stores. We must do the memory access inline,
207 or fault handling won't work. */ 116 or fault handling won't work. */
208 117
@@ -357,30 +266,6 @@ void glue(op_sdr, MEMSUFFIX) (void) @@ -357,30 +266,6 @@ void glue(op_sdr, MEMSUFFIX) (void)
357 266
358 FORCE_RET(); 267 FORCE_RET();
359 } 268 }
360 -  
361 -void glue(op_lld, MEMSUFFIX) (void)  
362 -{  
363 - T1 = T0;  
364 - T0 = glue(ldq, MEMSUFFIX)(T0);  
365 - env->CP0_LLAddr = T1;  
366 - FORCE_RET();  
367 -}  
368 -  
369 -void glue(op_scd, MEMSUFFIX) (void)  
370 -{  
371 - CALL_FROM_TB0(dump_sc);  
372 - if (T0 & 0x7) {  
373 - env->CP0_BadVAddr = T0;  
374 - CALL_FROM_TB1(do_raise_exception, EXCP_AdES);  
375 - }  
376 - if (T0 == env->CP0_LLAddr) {  
377 - glue(stq, MEMSUFFIX)(T0, T1);  
378 - T0 = 1;  
379 - } else {  
380 - T0 = 0;  
381 - }  
382 - FORCE_RET();  
383 -}  
384 #endif /* TARGET_MIPS64 */ 269 #endif /* TARGET_MIPS64 */
385 270
386 void glue(op_lwc1, MEMSUFFIX) (void) 271 void glue(op_lwc1, MEMSUFFIX) (void)