Commit 56fc64dfd009d1617f0433794f69321d1e4063bd

Authored by blueswir1
1 parent a245f2e7

Sparc code generator update (fix qemu_ld & qemu_st)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5014 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 101 additions and 129 deletions
tcg/sparc/tcg-target.c
@@ -141,9 +141,6 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str) @@ -141,9 +141,6 @@ static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
141 tcg_regset_reset_reg(ct->u.regs, TCG_REG_O0); 141 tcg_regset_reset_reg(ct->u.regs, TCG_REG_O0);
142 tcg_regset_reset_reg(ct->u.regs, TCG_REG_O1); 142 tcg_regset_reset_reg(ct->u.regs, TCG_REG_O1);
143 tcg_regset_reset_reg(ct->u.regs, TCG_REG_O2); 143 tcg_regset_reset_reg(ct->u.regs, TCG_REG_O2);
144 - // Internal use  
145 - tcg_regset_reset_reg(ct->u.regs, TCG_REG_L0);  
146 - tcg_regset_reset_reg(ct->u.regs, TCG_REG_L1);  
147 break; 144 break;
148 case 'I': 145 case 'I':
149 ct->ct |= TCG_CT_CONST_S11; 146 ct->ct |= TCG_CT_CONST_S11;
@@ -497,8 +494,8 @@ static const void * const qemu_st_helpers[4] = { @@ -497,8 +494,8 @@ static const void * const qemu_st_helpers[4] = {
497 static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, 494 static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
498 int opc) 495 int opc)
499 { 496 {
500 - int addr_reg, data_reg, r0, r1, arg0, arg1, mem_index, s_bits;  
501 - int target_ld_op, host_ld_op; 497 + int addr_reg, data_reg, arg0, arg1, arg2, mem_index, s_bits;
  498 + int target_ld_op, host_ld_op, sll_op, sra_op;
502 #if defined(CONFIG_SOFTMMU) 499 #if defined(CONFIG_SOFTMMU)
503 uint32_t *label1_ptr, *label2_ptr; 500 uint32_t *label1_ptr, *label2_ptr;
504 #endif 501 #endif
@@ -508,10 +505,9 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, @@ -508,10 +505,9 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
508 mem_index = *args; 505 mem_index = *args;
509 s_bits = opc & 3; 506 s_bits = opc & 3;
510 507
511 - r0 = TCG_REG_L0;  
512 - r1 = TCG_REG_L1;  
513 arg0 = TCG_REG_O0; 508 arg0 = TCG_REG_O0;
514 arg1 = TCG_REG_O1; 509 arg1 = TCG_REG_O1;
  510 + arg2 = TCG_REG_O2;
515 511
516 #if TARGET_LONG_BITS == 32 512 #if TARGET_LONG_BITS == 32
517 target_ld_op = LDUW; 513 target_ld_op = LDUW;
@@ -521,33 +517,39 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, @@ -521,33 +517,39 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
521 517
522 #ifdef __arch64__ 518 #ifdef __arch64__
523 host_ld_op = LDX; 519 host_ld_op = LDX;
  520 + sll_op = SHIFT_SLLX;
  521 + sra_op = SHIFT_SRAX;
524 #else 522 #else
525 host_ld_op = LDUW; 523 host_ld_op = LDUW;
  524 + sll_op = SHIFT_SLL;
  525 + sra_op = SHIFT_SRA;
526 #endif 526 #endif
527 527
528 528
529 #if defined(CONFIG_SOFTMMU) 529 #if defined(CONFIG_SOFTMMU)
530 - /* srl addr_reg, x, r1 */  
531 - tcg_out_arithi(s, r1, addr_reg, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS, 530 + /* srl addr_reg, x, arg1 */
  531 + tcg_out_arithi(s, arg1, addr_reg, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS,
532 SHIFT_SRL); 532 SHIFT_SRL);
533 - /* and addr_reg, x, r0 */  
534 - tcg_out_arithi(s, r0, addr_reg, TARGET_PAGE_MASK | ((1 << s_bits) - 1), 533 + /* and addr_reg, x, arg0 */
  534 + tcg_out_arithi(s, arg0, addr_reg, TARGET_PAGE_MASK | ((1 << s_bits) - 1),
535 ARITH_AND); 535 ARITH_AND);
536 536
537 - /* and r1, x, r1 */  
538 - tcg_out_andi(s, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); 537 + /* and arg1, x, arg1 */
  538 + tcg_out_andi(s, arg1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
539 539
540 - /* add r1, x, r1 */  
541 - tcg_out_addi(s, r1, offsetof(CPUState, tlb_table[mem_index][0].addr_read)); 540 + /* add arg1, x, arg1 */
  541 + tcg_out_addi(s, arg1, offsetof(CPUState,
  542 + tlb_table[mem_index][0].addr_read));
542 543
543 - /* add env, r1, r1 */  
544 - tcg_out_arith(s, r1, TCG_AREG0, r1, ARITH_ADD); 544 + /* add env, arg1, arg1 */
  545 + tcg_out_arith(s, arg1, TCG_AREG0, arg1, ARITH_ADD);
545 546
546 - /* ld [r1], arg1 */  
547 - tcg_out32(s, target_ld_op | INSN_RD(arg1) | INSN_RS1(r1) | INSN_RS2(TCG_REG_G0)); 547 + /* ld [arg1], arg2 */
  548 + tcg_out32(s, target_ld_op | INSN_RD(arg2) | INSN_RS1(arg1) |
  549 + INSN_RS2(TCG_REG_G0));
548 550
549 - /* subcc r0, arg1, %g0 */  
550 - tcg_out_arith(s, TCG_REG_G0, r0, arg1, ARITH_SUBCC); 551 + /* subcc arg0, arg2, %g0 */
  552 + tcg_out_arith(s, TCG_REG_G0, arg0, arg2, ARITH_SUBCC);
551 553
552 /* will become: 554 /* will become:
553 be label1 */ 555 be label1 */
@@ -569,25 +571,25 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, @@ -569,25 +571,25 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
569 switch(opc) { 571 switch(opc) {
570 case 0 | 4: 572 case 0 | 4:
571 /* sll arg0, 24/56, data_reg */ 573 /* sll arg0, 24/56, data_reg */
572 - tcg_out_arithi(s, data_reg, arg0, sizeof(tcg_target_long) * 8 - 8,  
573 - SHIFT_SLL); 574 + tcg_out_arithi(s, data_reg, arg0, (int)sizeof(tcg_target_long) * 8 - 8,
  575 + sll_op);
574 /* sra data_reg, 24/56, data_reg */ 576 /* sra data_reg, 24/56, data_reg */
575 - tcg_out_arithi(s, data_reg, data_reg, sizeof(tcg_target_long) * 8 - 8,  
576 - SHIFT_SRA); 577 + tcg_out_arithi(s, data_reg, data_reg,
  578 + (int)sizeof(tcg_target_long) * 8 - 8, sra_op);
577 break; 579 break;
578 case 1 | 4: 580 case 1 | 4:
579 /* sll arg0, 16/48, data_reg */ 581 /* sll arg0, 16/48, data_reg */
580 - tcg_out_arithi(s, data_reg, arg0, sizeof(tcg_target_long) * 8 - 16,  
581 - SHIFT_SLL); 582 + tcg_out_arithi(s, data_reg, arg0,
  583 + (int)sizeof(tcg_target_long) * 8 - 16, sll_op);
582 /* sra data_reg, 16/48, data_reg */ 584 /* sra data_reg, 16/48, data_reg */
583 - tcg_out_arithi(s, data_reg, data_reg, sizeof(tcg_target_long) * 8 - 16,  
584 - SHIFT_SRA); 585 + tcg_out_arithi(s, data_reg, data_reg,
  586 + (int)sizeof(tcg_target_long) * 8 - 16, sra_op);
585 break; 587 break;
586 case 2 | 4: 588 case 2 | 4:
587 /* sll arg0, 32, data_reg */ 589 /* sll arg0, 32, data_reg */
588 - tcg_out_arithi(s, data_reg, arg0, 32, SHIFT_SLL); 590 + tcg_out_arithi(s, data_reg, arg0, 32, sll_op);
589 /* sra data_reg, 32, data_reg */ 591 /* sra data_reg, 32, data_reg */
590 - tcg_out_arithi(s, data_reg, data_reg, 32, SHIFT_SRA); 592 + tcg_out_arithi(s, data_reg, data_reg, 32, sra_op);
591 break; 593 break;
592 case 0: 594 case 0:
593 case 1: 595 case 1:
@@ -612,67 +614,67 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, @@ -612,67 +614,67 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
612 INSN_OFF22((unsigned long)s->code_ptr - 614 INSN_OFF22((unsigned long)s->code_ptr -
613 (unsigned long)label1_ptr)); 615 (unsigned long)label1_ptr));
614 616
615 - /* ld [r1 + x], r1 */  
616 - tcg_out_ldst(s, r1, r1, offsetof(CPUTLBEntry, addend) - 617 + /* ld [arg1 + x], arg1 */
  618 + tcg_out_ldst(s, arg1, arg1, offsetof(CPUTLBEntry, addend) -
617 offsetof(CPUTLBEntry, addr_read), host_ld_op); 619 offsetof(CPUTLBEntry, addr_read), host_ld_op);
618 - /* add r0, r1, r0 */  
619 - tcg_out_arith(s, r0, r1, r0, ARITH_ADD); 620 + /* add addr_reg, arg1, arg0 */
  621 + tcg_out_arith(s, arg0, addr_reg, arg1, ARITH_ADD);
620 #else 622 #else
621 - r0 = addr_reg; 623 + arg0 = addr_reg;
622 #endif 624 #endif
623 625
624 switch(opc) { 626 switch(opc) {
625 case 0: 627 case 0:
626 - /* ldub [r0], data_reg */  
627 - tcg_out_ldst(s, data_reg, r0, 0, LDUB); 628 + /* ldub [arg0], data_reg */
  629 + tcg_out_ldst(s, data_reg, arg0, 0, LDUB);
628 break; 630 break;
629 case 0 | 4: 631 case 0 | 4:
630 - /* ldsb [r0], data_reg */  
631 - tcg_out_ldst(s, data_reg, r0, 0, LDSB); 632 + /* ldsb [arg0], data_reg */
  633 + tcg_out_ldst(s, data_reg, arg0, 0, LDSB);
632 break; 634 break;
633 case 1: 635 case 1:
634 #ifdef TARGET_WORDS_BIGENDIAN 636 #ifdef TARGET_WORDS_BIGENDIAN
635 - /* lduh [r0], data_reg */  
636 - tcg_out_ldst(s, data_reg, r0, 0, LDUH); 637 + /* lduh [arg0], data_reg */
  638 + tcg_out_ldst(s, data_reg, arg0, 0, LDUH);
637 #else 639 #else
638 - /* lduha [r0] ASI_PRIMARY_LITTLE, data_reg */  
639 - tcg_out_ldst_asi(s, data_reg, r0, 0, LDUHA, ASI_PRIMARY_LITTLE); 640 + /* lduha [arg0] ASI_PRIMARY_LITTLE, data_reg */
  641 + tcg_out_ldst_asi(s, data_reg, arg0, 0, LDUHA, ASI_PRIMARY_LITTLE);
640 #endif 642 #endif
641 break; 643 break;
642 case 1 | 4: 644 case 1 | 4:
643 #ifdef TARGET_WORDS_BIGENDIAN 645 #ifdef TARGET_WORDS_BIGENDIAN
644 - /* ldsh [r0], data_reg */  
645 - tcg_out_ldst(s, data_reg, r0, 0, LDSH); 646 + /* ldsh [arg0], data_reg */
  647 + tcg_out_ldst(s, data_reg, arg0, 0, LDSH);
646 #else 648 #else
647 - /* ldsha [r0] ASI_PRIMARY_LITTLE, data_reg */  
648 - tcg_out_ldst_asi(s, data_reg, r0, 0, LDSHA, ASI_PRIMARY_LITTLE); 649 + /* ldsha [arg0] ASI_PRIMARY_LITTLE, data_reg */
  650 + tcg_out_ldst_asi(s, data_reg, arg0, 0, LDSHA, ASI_PRIMARY_LITTLE);
649 #endif 651 #endif
650 break; 652 break;
651 case 2: 653 case 2:
652 #ifdef TARGET_WORDS_BIGENDIAN 654 #ifdef TARGET_WORDS_BIGENDIAN
653 - /* lduw [r0], data_reg */  
654 - tcg_out_ldst(s, data_reg, r0, 0, LDUW); 655 + /* lduw [arg0], data_reg */
  656 + tcg_out_ldst(s, data_reg, arg0, 0, LDUW);
655 #else 657 #else
656 - /* lduwa [r0] ASI_PRIMARY_LITTLE, data_reg */  
657 - tcg_out_ldst_asi(s, data_reg, r0, 0, LDUWA, ASI_PRIMARY_LITTLE); 658 + /* lduwa [arg0] ASI_PRIMARY_LITTLE, data_reg */
  659 + tcg_out_ldst_asi(s, data_reg, arg0, 0, LDUWA, ASI_PRIMARY_LITTLE);
658 #endif 660 #endif
659 break; 661 break;
660 case 2 | 4: 662 case 2 | 4:
661 #ifdef TARGET_WORDS_BIGENDIAN 663 #ifdef TARGET_WORDS_BIGENDIAN
662 - /* ldsw [r0], data_reg */  
663 - tcg_out_ldst(s, data_reg, r0, 0, LDSW); 664 + /* ldsw [arg0], data_reg */
  665 + tcg_out_ldst(s, data_reg, arg0, 0, LDSW);
664 #else 666 #else
665 - /* ldswa [r0] ASI_PRIMARY_LITTLE, data_reg */  
666 - tcg_out_ldst_asi(s, data_reg, r0, 0, LDSWA, ASI_PRIMARY_LITTLE); 667 + /* ldswa [arg0] ASI_PRIMARY_LITTLE, data_reg */
  668 + tcg_out_ldst_asi(s, data_reg, arg0, 0, LDSWA, ASI_PRIMARY_LITTLE);
667 #endif 669 #endif
668 break; 670 break;
669 case 3: 671 case 3:
670 #ifdef TARGET_WORDS_BIGENDIAN 672 #ifdef TARGET_WORDS_BIGENDIAN
671 - /* ldx [r0], data_reg */  
672 - tcg_out_ldst(s, data_reg, r0, 0, LDX); 673 + /* ldx [arg0], data_reg */
  674 + tcg_out_ldst(s, data_reg, arg0, 0, LDX);
673 #else 675 #else
674 - /* ldxa [r0] ASI_PRIMARY_LITTLE, data_reg */  
675 - tcg_out_ldst_asi(s, data_reg, r0, 0, LDXA, ASI_PRIMARY_LITTLE); 676 + /* ldxa [arg0] ASI_PRIMARY_LITTLE, data_reg */
  677 + tcg_out_ldst_asi(s, data_reg, arg0, 0, LDXA, ASI_PRIMARY_LITTLE);
676 #endif 678 #endif
677 break; 679 break;
678 default: 680 default:
@@ -690,7 +692,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, @@ -690,7 +692,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
690 static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, 692 static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
691 int opc) 693 int opc)
692 { 694 {
693 - int addr_reg, data_reg, r0, r1, arg0, arg1, arg2, mem_index, s_bits; 695 + int addr_reg, data_reg, arg0, arg1, arg2, mem_index, s_bits;
694 int target_ld_op, host_ld_op; 696 int target_ld_op, host_ld_op;
695 #if defined(CONFIG_SOFTMMU) 697 #if defined(CONFIG_SOFTMMU)
696 uint32_t *label1_ptr, *label2_ptr; 698 uint32_t *label1_ptr, *label2_ptr;
@@ -702,8 +704,6 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, @@ -702,8 +704,6 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
702 704
703 s_bits = opc; 705 s_bits = opc;
704 706
705 - r0 = TCG_REG_L0;  
706 - r1 = TCG_REG_L1;  
707 arg0 = TCG_REG_O0; 707 arg0 = TCG_REG_O0;
708 arg1 = TCG_REG_O1; 708 arg1 = TCG_REG_O1;
709 arg2 = TCG_REG_O2; 709 arg2 = TCG_REG_O2;
@@ -721,28 +721,30 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, @@ -721,28 +721,30 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
721 #endif 721 #endif
722 722
723 #if defined(CONFIG_SOFTMMU) 723 #if defined(CONFIG_SOFTMMU)
724 - /* srl addr_reg, x, r1 */  
725 - tcg_out_arithi(s, r1, addr_reg, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS, 724 + /* srl addr_reg, x, arg1 */
  725 + tcg_out_arithi(s, arg1, addr_reg, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS,
726 SHIFT_SRL); 726 SHIFT_SRL);
727 727
728 - /* and addr_reg, x, r0 */  
729 - tcg_out_arithi(s, r0, addr_reg, TARGET_PAGE_MASK | ((1 << s_bits) - 1), 728 + /* and addr_reg, x, arg0 */
  729 + tcg_out_arithi(s, arg0, addr_reg, TARGET_PAGE_MASK | ((1 << s_bits) - 1),
730 ARITH_AND); 730 ARITH_AND);
731 731
732 - /* and r1, x, r1 */  
733 - tcg_out_andi(s, r1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS); 732 + /* and arg1, x, arg1 */
  733 + tcg_out_andi(s, arg1, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
734 734
735 - /* add r1, x, r1 */  
736 - tcg_out_addi(s, r1, offsetof(CPUState, tlb_table[mem_index][0].addr_write)); 735 + /* add arg1, x, arg1 */
  736 + tcg_out_addi(s, arg1, offsetof(CPUState,
  737 + tlb_table[mem_index][0].addr_write));
737 738
738 - /* add env, r1, r1 */  
739 - tcg_out_arith(s, r1, TCG_AREG0, r1, ARITH_ADD); 739 + /* add env, arg1, arg1 */
  740 + tcg_out_arith(s, arg1, TCG_AREG0, arg1, ARITH_ADD);
740 741
741 - /* ld [r1], arg1 */  
742 - tcg_out32(s, target_ld_op | INSN_RD(arg1) | INSN_RS1(r1) | INSN_RS2(TCG_REG_G0)); 742 + /* ld [arg1], arg2 */
  743 + tcg_out32(s, target_ld_op | INSN_RD(arg2) | INSN_RS1(arg1) |
  744 + INSN_RS2(TCG_REG_G0));
743 745
744 - /* subcc r0, arg1, %g0 */  
745 - tcg_out_arith(s, TCG_REG_G0, r0, arg1, ARITH_SUBCC); 746 + /* subcc arg0, arg2, %g0 */
  747 + tcg_out_arith(s, TCG_REG_G0, arg0, arg2, ARITH_SUBCC);
746 748
747 /* will become: 749 /* will become:
748 be label1 */ 750 be label1 */
@@ -752,40 +754,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, @@ -752,40 +754,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
752 /* mov (delay slot) */ 754 /* mov (delay slot) */
753 tcg_out_mov(s, arg0, addr_reg); 755 tcg_out_mov(s, arg0, addr_reg);
754 756
755 - /* arg1 = sign_extend(data_reg); */  
756 - switch(opc) {  
757 - case 0 | 4:  
758 - /* sll data_reg, 24/56, arg1 */  
759 - tcg_out_arithi(s, arg1, data_reg, sizeof(tcg_target_long) * 8 - 8, SHIFT_SLL);  
760 - /* sra arg1, 24/56, arg1 */  
761 - tcg_out_arithi(s, arg1, arg1, sizeof(tcg_target_long) * 8 - 8,  
762 - SHIFT_SRA);  
763 - break;  
764 - case 1 | 4:  
765 - /* sll data_reg, 16/48, arg1 */  
766 - tcg_out_arithi(s, data_reg, arg1, sizeof(tcg_target_long) * 8 - 16, SHIFT_SLL);  
767 - /* sra arg1, 16/48, arg1 */  
768 - tcg_out_arithi(s, arg1, arg1, sizeof(tcg_target_long) * 8 - 16,  
769 - SHIFT_SRA);  
770 - break;  
771 - case 2 | 4:  
772 - /* sll data_reg, 32, arg1 */  
773 - tcg_out_arithi(s, data_reg, arg1, 32, SHIFT_SLL);  
774 - /* sra arg1, 32, arg1 */  
775 - tcg_out_arithi(s, arg1, arg1, 32, SHIFT_SRA);  
776 - break;  
777 - case 0:  
778 - case 1:  
779 - case 2:  
780 - case 3:  
781 - default:  
782 - /* mov */  
783 - tcg_out_mov(s, arg1, data_reg);  
784 - break;  
785 - }  
786 -  
787 /* mov */ 757 /* mov */
788 - tcg_out_mov(s, arg0, addr_reg); 758 + tcg_out_mov(s, arg1, data_reg);
789 759
790 /* XXX: move that code at the end of the TB */ 760 /* XXX: move that code at the end of the TB */
791 /* qemu_st_helper[s_bits](arg0, arg1, arg2) */ 761 /* qemu_st_helper[s_bits](arg0, arg1, arg2) */
@@ -808,46 +778,46 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, @@ -808,46 +778,46 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
808 INSN_OFF22((unsigned long)s->code_ptr - 778 INSN_OFF22((unsigned long)s->code_ptr -
809 (unsigned long)label1_ptr)); 779 (unsigned long)label1_ptr));
810 780
811 - /* ld [r1 + x], r1 */  
812 - tcg_out_ldst(s, arg1, r1, offsetof(CPUTLBEntry, addend) - 781 + /* ld [arg1 + x], arg1 */
  782 + tcg_out_ldst(s, arg1, arg1, offsetof(CPUTLBEntry, addend) -
813 offsetof(CPUTLBEntry, addr_write), host_ld_op); 783 offsetof(CPUTLBEntry, addr_write), host_ld_op);
814 784
815 - /* add r0, r1, r0 */  
816 - tcg_out_arith(s, r0, arg1, r0, ARITH_ADD); 785 + /* add addr_reg, arg1, arg0 */
  786 + tcg_out_arith(s, arg0, addr_reg, arg1, ARITH_ADD);
817 #else 787 #else
818 - r0 = addr_reg; 788 + arg0 = addr_reg;
819 #endif 789 #endif
820 790
821 switch(opc) { 791 switch(opc) {
822 case 0: 792 case 0:
823 - /* stb data_reg, [r0] */  
824 - tcg_out_ldst(s, data_reg, r0, 0, STB); 793 + /* stb data_reg, [arg0] */
  794 + tcg_out_ldst(s, data_reg, arg0, 0, STB);
825 break; 795 break;
826 case 1: 796 case 1:
827 #ifdef TARGET_WORDS_BIGENDIAN 797 #ifdef TARGET_WORDS_BIGENDIAN
828 - /* sth data_reg, [r0] */  
829 - tcg_out_ldst(s, data_reg, r0, 0, STH); 798 + /* sth data_reg, [arg0] */
  799 + tcg_out_ldst(s, data_reg, arg0, 0, STH);
830 #else 800 #else
831 - /* stha data_reg, [r0] ASI_PRIMARY_LITTLE */  
832 - tcg_out_ldst_asi(s, data_reg, r0, 0, STHA, ASI_PRIMARY_LITTLE); 801 + /* stha data_reg, [arg0] ASI_PRIMARY_LITTLE */
  802 + tcg_out_ldst_asi(s, data_reg, arg0, 0, STHA, ASI_PRIMARY_LITTLE);
833 #endif 803 #endif
834 break; 804 break;
835 case 2: 805 case 2:
836 #ifdef TARGET_WORDS_BIGENDIAN 806 #ifdef TARGET_WORDS_BIGENDIAN
837 - /* stw data_reg, [r0] */  
838 - tcg_out_ldst(s, data_reg, r0, 0, STW); 807 + /* stw data_reg, [arg0] */
  808 + tcg_out_ldst(s, data_reg, arg0, 0, STW);
839 #else 809 #else
840 - /* stwa data_reg, [r0] ASI_PRIMARY_LITTLE */  
841 - tcg_out_ldst_asi(s, data_reg, r0, 0, STWA, ASI_PRIMARY_LITTLE); 810 + /* stwa data_reg, [arg0] ASI_PRIMARY_LITTLE */
  811 + tcg_out_ldst_asi(s, data_reg, arg0, 0, STWA, ASI_PRIMARY_LITTLE);
842 #endif 812 #endif
843 break; 813 break;
844 case 3: 814 case 3:
845 #ifdef TARGET_WORDS_BIGENDIAN 815 #ifdef TARGET_WORDS_BIGENDIAN
846 - /* stx data_reg, [r0] */  
847 - tcg_out_ldst(s, data_reg, r0, 0, STX); 816 + /* stx data_reg, [arg0] */
  817 + tcg_out_ldst(s, data_reg, arg0, 0, STX);
848 #else 818 #else
849 - /* stxa data_reg, [r0] ASI_PRIMARY_LITTLE */  
850 - tcg_out_ldst_asi(s, data_reg, r0, 0, STXA, ASI_PRIMARY_LITTLE); 819 + /* stxa data_reg, [arg0] ASI_PRIMARY_LITTLE */
  820 + tcg_out_ldst_asi(s, data_reg, arg0, 0, STXA, ASI_PRIMARY_LITTLE);
851 #endif 821 #endif
852 break; 822 break;
853 default: 823 default:
@@ -1164,6 +1134,8 @@ static const TCGTargetOpDef sparc_op_defs[] = { @@ -1164,6 +1134,8 @@ static const TCGTargetOpDef sparc_op_defs[] = {
1164 { INDEX_op_st16_i64, { "r", "r" } }, 1134 { INDEX_op_st16_i64, { "r", "r" } },
1165 { INDEX_op_st32_i64, { "r", "r" } }, 1135 { INDEX_op_st32_i64, { "r", "r" } },
1166 { INDEX_op_st_i64, { "r", "r" } }, 1136 { INDEX_op_st_i64, { "r", "r" } },
  1137 + { INDEX_op_qemu_ld64, { "L", "L" } },
  1138 + { INDEX_op_qemu_st64, { "L", "L" } },
1167 1139
1168 { INDEX_op_add_i64, { "r", "r", "rJ" } }, 1140 { INDEX_op_add_i64, { "r", "r", "rJ" } },
1169 { INDEX_op_mul_i64, { "r", "r", "rJ" } }, 1141 { INDEX_op_mul_i64, { "r", "r", "rJ" } },