gwj / at91sam9263 · Commits

Commit 563e3c6e6e47536bdaad277ec545e27ee0594c41

Authored by aurel32
1 parent f34af52c

Parallel Port Direction Fix 

The direction bit in the control register should not be directly

set using PPWCONTROL. The kernel gives the following debug message.

    parport0 (ppdev0): use data_reverse for this!

More over setting the data pins to forward mode does not work,
perhaps a bug in the Linux PP driver. The right way to do this is
to use PPDATADIR to set the direction. The patch checks if the
user is toggling the direction bit, and invokes PPDATADIR to
do the job.

Signed-off-by: Vijay Kumar B <vijaykumar@bravegnu.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5063 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 3 changed files with 17 additions and 0 deletions
hw/parallel.c
  View file @563e3c6
@@ -129,6 +129,7 @@ static void parallel_ioport_write_hw(void *opaque, uint32_t addr, uint32_t val) @@ -129,6 +129,7 @@ static void parallel_ioport_write_hw(void *opaque, uint32_t addr, uint32_t val)
129 { 129 {
130 ParallelState *s = opaque; 130 ParallelState *s = opaque;
131 uint8_t parm = val; 131 uint8_t parm = val;
  132 + int dir;
132 133
133 /* Sometimes programs do several writes for timing purposes on old 134 /* Sometimes programs do several writes for timing purposes on old
134 HW. Take care not to waste time on writes that do nothing. */ 135 HW. Take care not to waste time on writes that do nothing. */
@@ -154,6 +155,17 @@ static void parallel_ioport_write_hw(void *opaque, uint32_t addr, uint32_t val) @@ -154,6 +155,17 @@ static void parallel_ioport_write_hw(void *opaque, uint32_t addr, uint32_t val)
154 if (s->control == val) 155 if (s->control == val)
155 return; 156 return;
156 pdebug("wc%02x\n", val); 157 pdebug("wc%02x\n", val);
  158 +
  159 + if ((val & PARA_CTR_DIR) != (s->control & PARA_CTR_DIR)) {
  160 + if (val & PARA_CTR_DIR) {
  161 + dir = 1;
  162 + } else {
  163 + dir = 0;
  164 + }
  165 + qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_DATA_DIR, &dir);
  166 + parm &= ~PARA_CTR_DIR;
  167 + }
  168 +
157 qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_WRITE_CONTROL, &parm); 169 qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_WRITE_CONTROL, &parm);
158 s->control = val; 170 s->control = val;
159 break; 171 break;
qemu-char.h
  View file @563e3c6
@@ -27,6 +27,7 @@ typedef struct { @@ -27,6 +27,7 @@ typedef struct {
27 #define CHR_IOCTL_PP_EPP_READ 9 27 #define CHR_IOCTL_PP_EPP_READ 9
28 #define CHR_IOCTL_PP_EPP_WRITE_ADDR 10 28 #define CHR_IOCTL_PP_EPP_WRITE_ADDR 10
29 #define CHR_IOCTL_PP_EPP_WRITE 11 29 #define CHR_IOCTL_PP_EPP_WRITE 11
  30 +#define CHR_IOCTL_PP_DATA_DIR 12
30 31
31 #define CHR_IOCTL_SERIAL_SET_TIOCM 12 32 #define CHR_IOCTL_SERIAL_SET_TIOCM 12
32 #define CHR_IOCTL_SERIAL_GET_TIOCM 13 33 #define CHR_IOCTL_SERIAL_GET_TIOCM 13
@@ -2835,6 +2835,10 @@ static int pp_ioctl(CharDriverState *chr, int cmd, void *arg) @@ -2835,6 +2835,10 @@ static int pp_ioctl(CharDriverState *chr, int cmd, void *arg)
2835 return -ENOTSUP; 2835 return -ENOTSUP;
2836 *(uint8_t *)arg = b; 2836 *(uint8_t *)arg = b;
2837 break; 2837 break;
  2838 + case CHR_IOCTL_PP_DATA_DIR:
  2839 + if (ioctl(fd, PPDATADIR, (int *)arg) < 0)
  2840 + return -ENOTSUP;
  2841 + break;
2838 case CHR_IOCTL_PP_EPP_READ_ADDR: 2842 case CHR_IOCTL_PP_EPP_READ_ADDR:
2839 if (pp_hw_mode(drv, IEEE1284_MODE_EPP|IEEE1284_ADDR)) { 2843 if (pp_hw_mode(drv, IEEE1284_MODE_EPP|IEEE1284_ADDR)) {
2840 struct ParallelIOArg *parg = arg; 2844 struct ParallelIOArg *parg = arg;