gwj / at91sam9263 · Commits

Commit 551bd27f22638c854c43d7e6417d549764311c31

Authored by ths
1 parent 06e80fc9

Convert remaining __builtin_expect to likely/unlikely, by Jan Kiszka. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4840 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 9 changed files with 19 additions and 19 deletions
cpu-exec.c
  View file @551bd27
... ... @@ -224,8 +224,8 @@ static inline TranslationBlock *tb_find_fast(void)
224 224 #error unsupported CPU
225 225 #endif
226 226 tb = env->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
227   - if (__builtin_expect(!tb || tb->pc != pc || tb->cs_base != cs_base ||
228   - tb->flags != flags, 0)) {
  227 + if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
  228 + tb->flags != flags)) {
229 229 tb = tb_find_slow(pc, cs_base, flags);
230 230 }
231 231 return tb;
... ... @@ -360,7 +360,7 @@ int cpu_exec(CPUState *env1)
360 360 next_tb = 0; /* force lookup of first TB */
361 361 for(;;) {
362 362 interrupt_request = env->interrupt_request;
363   - if (__builtin_expect(interrupt_request, 0) &&
  363 + if (unlikely(interrupt_request) &&
364 364 likely(!(env->singlestep_enabled & SSTEP_NOIRQ))) {
365 365 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
366 366 env->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
... ...
exec-all.h
  View file @551bd27
... ... @@ -357,8 +357,8 @@ static inline target_ulong get_phys_addr_code(CPUState *env1, target_ulong addr)
357 357  
358 358 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
359 359 mmu_idx = cpu_mmu_index(env1);
360   - if (__builtin_expect(env1->tlb_table[mmu_idx][page_index].addr_code !=
361   - (addr & TARGET_PAGE_MASK), 0)) {
  360 + if (unlikely(env1->tlb_table[mmu_idx][page_index].addr_code !=
  361 + (addr & TARGET_PAGE_MASK))) {
362 362 ldub_code(addr);
363 363 }
364 364 pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK;
... ...
softmmu_header.h
  View file @551bd27
... ... @@ -231,8 +231,8 @@ static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr)
231 231 addr = ptr;
232 232 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
233 233 mmu_idx = CPU_MMU_INDEX;
234   - if (__builtin_expect(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
235   - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
  234 + if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
  235 + (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
236 236 res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
237 237 } else {
238 238 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
... ... @@ -252,8 +252,8 @@ static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr)
252 252 addr = ptr;
253 253 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
254 254 mmu_idx = CPU_MMU_INDEX;
255   - if (__builtin_expect(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
256   - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
  255 + if (unlikely(env->tlb_table[mmu_idx][page_index].ADDR_READ !=
  256 + (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
257 257 res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx);
258 258 } else {
259 259 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
... ... @@ -277,8 +277,8 @@ static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE
277 277 addr = ptr;
278 278 page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
279 279 mmu_idx = CPU_MMU_INDEX;
280   - if (__builtin_expect(env->tlb_table[mmu_idx][page_index].addr_write !=
281   - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) {
  280 + if (unlikely(env->tlb_table[mmu_idx][page_index].addr_write !=
  281 + (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) {
282 282 glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx);
283 283 } else {
284 284 physaddr = addr + env->tlb_table[mmu_idx][page_index].addend;
... ...
target-arm/op_helper.c
  View file @551bd27
... ... @@ -97,7 +97,7 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
97 97 saved_env = env;
98 98 env = cpu_single_env;
99 99 ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
100   - if (__builtin_expect(ret, 0)) {
  100 + if (unlikely(ret)) {
101 101 if (retaddr) {
102 102 /* now we have a real cpu fault */
103 103 pc = (unsigned long)retaddr;
... ...
target-arm/translate.c
  View file @551bd27
... ... @@ -3393,7 +3393,7 @@ static inline void gen_goto_tb(DisasContext *s, int n, uint32_t dest)
3393 3393  
3394 3394 static inline void gen_jmp (DisasContext *s, uint32_t dest)
3395 3395 {
3396   - if (__builtin_expect(s->singlestep_enabled, 0)) {
  3396 + if (unlikely(s->singlestep_enabled)) {
3397 3397 /* An indirect jump so that we still trigger the debug exception. */
3398 3398 if (s->thumb)
3399 3399 dest |= 1;
... ... @@ -8703,7 +8703,7 @@ static inline int gen_intermediate_code_internal(CPUState *env,
8703 8703 /* At this stage dc->condjmp will only be set when the skipped
8704 8704 instruction was a conditional branch or trap, and the PC has
8705 8705 already been written. */
8706   - if (__builtin_expect(env->singlestep_enabled, 0)) {
  8706 + if (unlikely(env->singlestep_enabled)) {
8707 8707 /* Make sure the pc is updated, and raise a debug exception. */
8708 8708 if (dc->condjmp) {
8709 8709 gen_set_condexec(dc);
... ...
target-cris/op_helper.c
  View file @551bd27
... ... @@ -61,7 +61,7 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
61 61 D(fprintf(logfile, "%s pc=%x tpc=%x ra=%x\n", __func__,
62 62 env->pc, env->debug1, retaddr));
63 63 ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
64   - if (__builtin_expect(ret, 0)) {
  64 + if (unlikely(ret)) {
65 65 if (retaddr) {
66 66 /* now we have a real cpu fault */
67 67 pc = (unsigned long)retaddr;
... ...
target-cris/translate.c
  View file @551bd27
... ... @@ -3191,7 +3191,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
3191 3191  
3192 3192 cris_evaluate_flags (dc);
3193 3193  
3194   - if (__builtin_expect(env->singlestep_enabled, 0)) {
  3194 + if (unlikely(env->singlestep_enabled)) {
3195 3195 tcg_gen_movi_tl(env_pc, npc);
3196 3196 t_gen_raise_exception(EXCP_DEBUG);
3197 3197 } else {
... ...
target-m68k/op_helper.c
  View file @551bd27
... ... @@ -61,7 +61,7 @@ void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
61 61 saved_env = env;
62 62 env = cpu_single_env;
63 63 ret = cpu_m68k_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
64   - if (__builtin_expect(ret, 0)) {
  64 + if (unlikely(ret)) {
65 65 if (retaddr) {
66 66 /* now we have a real cpu fault */
67 67 pc = (unsigned long)retaddr;
... ...
target-m68k/translate.c
  View file @551bd27
... ... @@ -873,7 +873,7 @@ static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest)
873 873 TranslationBlock *tb;
874 874  
875 875 tb = s->tb;
876   - if (__builtin_expect (s->singlestep_enabled, 0)) {
  876 + if (unlikely(s->singlestep_enabled)) {
877 877 gen_exception(s, dest, EXCP_DEBUG);
878 878 } else if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK) ||
879 879 (s->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK)) {
... ... @@ -2991,7 +2991,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
2991 2991  
2992 2992 if (tb->cflags & CF_LAST_IO)
2993 2993 gen_io_end();
2994   - if (__builtin_expect(env->singlestep_enabled, 0)) {
  2994 + if (unlikely(env->singlestep_enabled)) {
2995 2995 /* Make sure the pc is updated, and raise a debug exception. */
2996 2996 if (!dc->is_jmp) {
2997 2997 gen_flush_cc_op(dc);
... ...