Commit 54cdcae646bdc4b87b2355ba7d9aab85c39b2c31

Authored by aurel32
1 parent b2b183c2

target-ppc: add functions to load/store SPR

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5881 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 13 additions and 2 deletions
target-ppc/translate.c
... ... @@ -688,6 +688,17 @@ OPCODES_SECTION opcode_t opc_##name = { \
688 688 .oname = stringify(name), \
689 689 }
690 690  
  691 +/* SPR load/store helpers */
  692 +static always_inline void gen_load_spr(TCGv t, int reg)
  693 +{
  694 + tcg_gen_ld_tl(t, cpu_env, offsetof(CPUState, spr[reg]));
  695 +}
  696 +
  697 +static always_inline void gen_store_spr(int reg, TCGv t)
  698 +{
  699 + tcg_gen_st_tl(t, cpu_env, offsetof(CPUState, spr[reg]));
  700 +}
  701 +
691 702 /* Start opcode list */
692 703 GEN_OPCODE_MARK(start);
693 704  
... ... @@ -1550,10 +1561,10 @@ GEN_HANDLER(or, 0x1F, 0x1C, 0x0D, 0x00000000, PPC_INTEGER)
1550 1561 }
1551 1562 if (prio) {
1552 1563 TCGv t0 = tcg_temp_new();
1553   - tcg_gen_ld_tl(t0, cpu_env, offsetof(CPUState, spr[SPR_PPR]));
  1564 + gen_load_spr(t0, SPR_PPR);
1554 1565 tcg_gen_andi_tl(t0, t0, ~0x001C000000000000ULL);
1555 1566 tcg_gen_ori_tl(t0, t0, ((uint64_t)prio) << 50);
1556   - tcg_gen_st_tl(t0, cpu_env, offsetof(CPUState, spr[SPR_PPR]));
  1567 + gen_store_spr(SPR_PPR, t0);
1557 1568 tcg_temp_free(t0);
1558 1569 }
1559 1570 #endif
... ...