gwj / at91sam9263 · Commits

Commit 522777bbafd9151da17199f558c036f791b5cac1

Authored by ths
1 parent 85028e4d

Make detection of unsupported hosts easier, inspired by a patch from 

Stefan Weil.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2791 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 2 changed files with 41 additions and 80 deletions
dyngen-exec.h
  View file @522777b
... ... @@ -89,21 +89,19 @@ extern int printf(const char *, ...);
89 89 #undef NULL
90 90 #define NULL 0
91 91  
92   -#ifdef __i386__
  92 +#if defined(__i386__)
93 93 #define AREG0 "ebp"
94 94 #define AREG1 "ebx"
95 95 #define AREG2 "esi"
96 96 #define AREG3 "edi"
97   -#endif
98   -#ifdef __x86_64__
  97 +#elif defined(__x86_64__)
99 98 #define AREG0 "r14"
100 99 #define AREG1 "r15"
101 100 #define AREG2 "r12"
102 101 #define AREG3 "r13"
103 102 //#define AREG4 "rbp"
104 103 //#define AREG5 "rbx"
105   -#endif
106   -#ifdef __powerpc__
  104 +#elif defined(__powerpc__)
107 105 #define AREG0 "r27"
108 106 #define AREG1 "r24"
109 107 #define AREG2 "r25"
... ... @@ -121,14 +119,12 @@ extern int printf(const char *, ...);
121 119 #endif
122 120 #define USE_INT_TO_FLOAT_HELPERS
123 121 #define BUGGY_GCC_DIV64
124   -#endif
125   -#ifdef __arm__
  122 +#elif defined(__arm__)
126 123 #define AREG0 "r7"
127 124 #define AREG1 "r4"
128 125 #define AREG2 "r5"
129 126 #define AREG3 "r6"
130   -#endif
131   -#ifdef __mips__
  127 +#elif defined(__mips__)
132 128 #define AREG0 "fp"
133 129 #define AREG1 "s0"
134 130 #define AREG2 "s1"
... ... @@ -138,8 +134,7 @@ extern int printf(const char *, ...);
138 134 #define AREG6 "s5"
139 135 #define AREG7 "s6"
140 136 #define AREG8 "s7"
141   -#endif
142   -#ifdef __sparc__
  137 +#elif defined(__sparc__)
143 138 #ifdef HOST_SOLARIS
144 139 #define AREG0 "g2"
145 140 #define AREG1 "g3"
... ... @@ -168,14 +163,12 @@ extern int printf(const char *, ...);
168 163 #endif
169 164 #endif
170 165 #define USE_FP_CONVERT
171   -#endif
172   -#ifdef __s390__
  166 +#elif defined(__s390__)
173 167 #define AREG0 "r10"
174 168 #define AREG1 "r7"
175 169 #define AREG2 "r8"
176 170 #define AREG3 "r9"
177   -#endif
178   -#ifdef __alpha__
  171 +#elif defined(__alpha__)
179 172 /* Note $15 is the frame pointer, so anything in op-i386.c that would
180 173 require a frame pointer, like alloca, would probably loose. */
181 174 #define AREG0 "$15"
... ... @@ -185,19 +178,19 @@ extern int printf(const char *, ...);
185 178 #define AREG4 "$12"
186 179 #define AREG5 "$13"
187 180 #define AREG6 "$14"
188   -#endif
189   -#ifdef __mc68000
  181 +#elif defined(__mc68000)
190 182 #define AREG0 "%a5"
191 183 #define AREG1 "%a4"
192 184 #define AREG2 "%d7"
193 185 #define AREG3 "%d6"
194 186 #define AREG4 "%d5"
195   -#endif
196   -#ifdef __ia64__
  187 +#elif defined(__ia64__)
197 188 #define AREG0 "r7"
198 189 #define AREG1 "r4"
199 190 #define AREG2 "r5"
200 191 #define AREG3 "r6"
  192 +#else
  193 +#error unsupported CPU
201 194 #endif
202 195  
203 196 /* force GCC to generate only one epilog at the end of the function */
... ... @@ -250,44 +243,37 @@ extern int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3;
250 243 #define ASM_NAME(x) #x
251 244 #endif
252 245  
253   -#ifdef __i386__
  246 +#if defined(__i386__)
254 247 #define EXIT_TB() asm volatile ("ret")
255 248 #define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n)
256   -#endif
257   -#ifdef __x86_64__
  249 +#elif defined(__x86_64__)
258 250 #define EXIT_TB() asm volatile ("ret")
259 251 #define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n)
260   -#endif
261   -#ifdef __powerpc__
  252 +#elif defined(__powerpc__)
262 253 #define EXIT_TB() asm volatile ("blr")
263 254 #define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n)
264   -#endif
265   -#ifdef __s390__
  255 +#elif defined(__s390__)
266 256 #define EXIT_TB() asm volatile ("br %r14")
267 257 #define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n)
268   -#endif
269   -#ifdef __alpha__
  258 +#elif defined(__alpha__)
270 259 #define EXIT_TB() asm volatile ("ret")
271   -#endif
272   -#ifdef __ia64__
  260 +#elif defined(__ia64__)
273 261 #define EXIT_TB() asm volatile ("br.ret.sptk.many b0;;")
274 262 #define GOTO_LABEL_PARAM(n) asm volatile ("br.sptk.many " \
275 263 ASM_NAME(__op_gen_label) #n)
276   -#endif
277   -#ifdef __sparc__
  264 +#elif defined(__sparc__)
278 265 #define EXIT_TB() asm volatile ("jmpl %i0 + 8, %g0; nop")
279 266 #define GOTO_LABEL_PARAM(n) asm volatile ("ba " ASM_NAME(__op_gen_label) #n ";nop")
280   -#endif
281   -#ifdef __arm__
  267 +#elif defined(__arm__)
282 268 #define EXIT_TB() asm volatile ("b exec_loop")
283 269 #define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n)
284   -#endif
285   -#ifdef __mc68000
  270 +#elif defined(__mc68000)
286 271 #define EXIT_TB() asm volatile ("rts")
287   -#endif
288   -#ifdef __mips__
  272 +#elif defined(__mips__)
289 273 #define EXIT_TB() asm volatile ("jr $ra")
290 274 #define GOTO_LABEL_PARAM(n) asm volatile (".set noat; la $1, " ASM_NAME(__op_gen_label) #n "; jr $1; .set at")
  275 +#else
  276 +#error unsupported CPU
291 277 #endif
292 278  
293 279 #endif /* !defined(__DYNGEN_EXEC_H__) */
... ...
dyngen.h
  View file @522777b
... ... @@ -28,25 +28,11 @@ int __op_param1, __op_param2, __op_param3;
28 28 #endif
29 29 int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3;
30 30  
31   -#ifdef __i386__
  31 +#if defined(__i386__) || defined(__x86_64__) || defined(__s390__)
32 32 static inline void flush_icache_range(unsigned long start, unsigned long stop)
33 33 {
34 34 }
35   -#endif
36   -
37   -#ifdef __x86_64__
38   -static inline void flush_icache_range(unsigned long start, unsigned long stop)
39   -{
40   -}
41   -#endif
42   -
43   -#ifdef __s390__
44   -static inline void flush_icache_range(unsigned long start, unsigned long stop)
45   -{
46   -}
47   -#endif
48   -
49   -#ifdef __ia64__
  35 +#elif defined(__ia64__)
50 36 static inline void flush_icache_range(unsigned long start, unsigned long stop)
51 37 {
52 38 while (start < stop) {
... ... @@ -55,9 +41,7 @@ static inline void flush_icache_range(unsigned long start, unsigned long stop)
55 41 }
56 42 asm volatile (";;sync.i;;srlz.i;;");
57 43 }
58   -#endif
59   -
60   -#ifdef __powerpc__
  44 +#elif defined(__powerpc__)
61 45  
62 46 #define MIN_CACHE_LINE_SIZE 8 /* conservative value */
63 47  
... ... @@ -78,17 +62,12 @@ static void inline flush_icache_range(unsigned long start, unsigned long stop)
78 62 asm volatile ("sync" : : : "memory");
79 63 asm volatile ("isync" : : : "memory");
80 64 }
81   -#endif
82   -
83   -#ifdef __alpha__
  65 +#elif defined(__alpha__)
84 66 static inline void flush_icache_range(unsigned long start, unsigned long stop)
85 67 {
86 68 asm ("imb");
87 69 }
88   -#endif
89   -
90   -#ifdef __sparc__
91   -
  70 +#elif defined(__sparc__)
92 71 static void inline flush_icache_range(unsigned long start, unsigned long stop)
93 72 {
94 73 unsigned long p;
... ... @@ -99,10 +78,7 @@ static void inline flush_icache_range(unsigned long start, unsigned long stop)
99 78 for (; p < stop; p += 8)
100 79 __asm__ __volatile__("flush\t%0" : : "r" (p));
101 80 }
102   -
103   -#endif
104   -
105   -#ifdef __arm__
  81 +#elif defined(__arm__)
106 82 static inline void flush_icache_range(unsigned long start, unsigned long stop)
107 83 {
108 84 register unsigned long _beg __asm ("a1") = start;
... ... @@ -110,14 +86,22 @@ static inline void flush_icache_range(unsigned long start, unsigned long stop)
110 86 register unsigned long _flg __asm ("a3") = 0;
111 87 __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
112 88 }
113   -#endif
  89 +#elif defined(__mc68000)
114 90  
115   -#ifdef __mc68000
116   -#include <asm/cachectl.h>
  91 +# include <asm/cachectl.h>
117 92 static inline void flush_icache_range(unsigned long start, unsigned long stop)
118 93 {
119 94 cacheflush(start,FLUSH_SCOPE_LINE,FLUSH_CACHE_BOTH,stop-start+16);
120 95 }
  96 +#elif defined(__mips__)
  97 +
  98 +#include <sys/cachectl.h>
  99 +static inline void flush_icache_range(unsigned long start, unsigned long stop)
  100 +{
  101 + _flush_cache ((void *)start, stop - start, BCACHE);
  102 +}
  103 +#else
  104 +#error unsupported CPU
121 105 #endif
122 106  
123 107 #ifdef __alpha__
... ... @@ -248,7 +232,6 @@ static uint8_t *arm_flush_ldr(uint8_t *gen_code_ptr,
248 232  
249 233 #ifdef __ia64
250 234  
251   -
252 235 /* Patch instruction with "val" where "mask" has 1 bits. */
253 236 static inline void ia64_patch (uint64_t insn_addr, uint64_t mask, uint64_t val)
254 237 {
... ... @@ -463,11 +446,3 @@ static inline void ia64_apply_fixes (uint8_t **gen_code_pp,
463 446 }
464 447  
465 448 #endif
466   -
467   -#ifdef __mips__
468   -#include <sys/cachectl.h>
469   -static inline void flush_icache_range(unsigned long start, unsigned long stop)
470   -{
471   - _flush_cache ((void *)start, stop - start, BCACHE);
472   -}
473   -#endif
... ...