gwj / at91sam9263 · Commits

Commit 51b2772f28f51b04e10e6e51f411f7246e1159d9

Authored by ths
1 parent fdf41d22

Fix CPU (re-)selection on reset. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 5 changed files with 12 additions and 4 deletions
hw/mips_malta.c
  View file @51b2772
... ... @@ -748,6 +748,7 @@ static void main_cpu_reset(void *opaque)
748 748 {
749 749 CPUState *env = opaque;
750 750 cpu_reset(env);
  751 + cpu_mips_register(env, NULL);
751 752  
752 753 /* The bootload does not need to be rewritten as it is located in a
753 754 read only location. The kernel location and the arguments table
... ...
hw/mips_pica61.c
  View file @51b2772
... ... @@ -51,6 +51,7 @@ static void main_cpu_reset(void *opaque)
51 51 {
52 52 CPUState *env = opaque;
53 53 cpu_reset(env);
  54 + cpu_mips_register(env, NULL);
54 55 }
55 56  
56 57 static
... ...
hw/mips_r4k.c
  View file @51b2772
... ... @@ -128,6 +128,7 @@ static void main_cpu_reset(void *opaque)
128 128 {
129 129 CPUState *env = opaque;
130 130 cpu_reset(env);
  131 + cpu_mips_register(env, NULL);
131 132  
132 133 if (env->kernel_filename)
133 134 load_kernel (env, env->ram_size, env->kernel_filename,
... ...
target-mips/cpu.h
  View file @51b2772
... ... @@ -48,6 +48,8 @@ struct r4k_tlb_t {
48 48 target_ulong PFN[2];
49 49 };
50 50  
  51 +typedef struct mips_def_t mips_def_t;
  52 +
51 53 typedef struct CPUMIPSState CPUMIPSState;
52 54 struct CPUMIPSState {
53 55 /* General integer registers */
... ... @@ -295,6 +297,8 @@ struct CPUMIPSState {
295 297 const char *kernel_cmdline;
296 298 const char *initrd_filename;
297 299  
  300 + mips_def_t *cpu_model;
  301 +
298 302 struct QEMUTimer *timer; /* Internal timer */
299 303 };
300 304  
... ... @@ -308,7 +312,6 @@ void r4k_do_tlbwi (void);
308 312 void r4k_do_tlbwr (void);
309 313 void r4k_do_tlbp (void);
310 314 void r4k_do_tlbr (void);
311   -typedef struct mips_def_t mips_def_t;
312 315 int mips_find_by_name (const unsigned char *name, mips_def_t **def);
313 316 void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
314 317 int cpu_mips_register (CPUMIPSState *env, mips_def_t *def);
... ...
target-mips/translate_init.c
  View file @51b2772
... ... @@ -207,12 +207,14 @@ static void r4k_mmu_init (CPUMIPSState *env, mips_def_t *def)
207 207 int cpu_mips_register (CPUMIPSState *env, mips_def_t *def)
208 208 {
209 209 if (!def)
  210 + def = env->cpu_model;
  211 + if (!def)
210 212 cpu_abort(env, "Unable to find MIPS CPU definition\n");
  213 + env->cpu_model = def;
211 214 env->CP0_PRid = def->CP0_PRid;
212   -#ifdef TARGET_WORDS_BIGENDIAN
213   - env->CP0_Config0 = def->CP0_Config0 | (1 << CP0C0_BE);
214   -#else
215 215 env->CP0_Config0 = def->CP0_Config0;
  216 +#ifdef TARGET_WORDS_BIGENDIAN
  217 + env->CP0_Config0 |= (1 << CP0C0_BE);
216 218 #endif
217 219 env->CP0_Config1 = def->CP0_Config1;
218 220 env->CP0_Config2 = def->CP0_Config2;
... ...