gwj / at91sam9263 · Commits

Commit 508d92d0573319d7dbd827f6216aec44c1421832

Authored by bellard
1 parent 64f5a135

16 bit divider 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2138 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 9 additions and 6 deletions
hw/serial.c
  View file @508d92d
@@ -71,7 +71,7 @@ @@ -71,7 +71,7 @@
71 #define UART_LSR_DR 0x01 /* Receiver data ready */ 71 #define UART_LSR_DR 0x01 /* Receiver data ready */
72 72
73 struct SerialState { 73 struct SerialState {
74 - uint8_t divider; 74 + uint16_t divider;
75 uint8_t rbr; /* receive register */ 75 uint8_t rbr; /* receive register */
76 uint8_t ier; 76 uint8_t ier;
77 uint8_t iir; /* read only */ 77 uint8_t iir; /* read only */
@@ -310,7 +310,7 @@ static void serial_save(QEMUFile *f, void *opaque) @@ -310,7 +310,7 @@ static void serial_save(QEMUFile *f, void *opaque)
310 { 310 {
311 SerialState *s = opaque; 311 SerialState *s = opaque;
312 312
313 - qemu_put_8s(f,&s->divider); 313 + qemu_put_be16s(f,&s->divider);
314 qemu_put_8s(f,&s->rbr); 314 qemu_put_8s(f,&s->rbr);
315 qemu_put_8s(f,&s->ier); 315 qemu_put_8s(f,&s->ier);
316 qemu_put_8s(f,&s->iir); 316 qemu_put_8s(f,&s->iir);
@@ -325,10 +325,13 @@ static int serial_load(QEMUFile *f, void *opaque, int version_id) @@ -325,10 +325,13 @@ static int serial_load(QEMUFile *f, void *opaque, int version_id)
325 { 325 {
326 SerialState *s = opaque; 326 SerialState *s = opaque;
327 327
328 - if(version_id != 1) 328 + if(version_id > 2)
329 return -EINVAL; 329 return -EINVAL;
330 330
331 - qemu_get_8s(f,&s->divider); 331 + if (version_id >= 2)
  332 + qemu_get_be16s(f, &s->divider);
  333 + else
  334 + s->divider = qemu_get_byte(f);
332 qemu_get_8s(f,&s->rbr); 335 qemu_get_8s(f,&s->rbr);
333 qemu_get_8s(f,&s->ier); 336 qemu_get_8s(f,&s->ier);
334 qemu_get_8s(f,&s->iir); 337 qemu_get_8s(f,&s->iir);
@@ -357,7 +360,7 @@ SerialState *serial_init(SetIRQFunc *set_irq, void *opaque, @@ -357,7 +360,7 @@ SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
357 s->iir = UART_IIR_NO_INT; 360 s->iir = UART_IIR_NO_INT;
358 s->msr = UART_MSR_DCD | UART_MSR_DSR | UART_MSR_CTS; 361 s->msr = UART_MSR_DCD | UART_MSR_DSR | UART_MSR_CTS;
359 362
360 - register_savevm("serial", base, 1, serial_save, serial_load, s); 363 + register_savevm("serial", base, 2, serial_save, serial_load, s);
361 364
362 register_ioport_write(base, 8, 1, serial_ioport_write, s); 365 register_ioport_write(base, 8, 1, serial_ioport_write, s);
363 register_ioport_read(base, 8, 1, serial_ioport_read, s); 366 register_ioport_read(base, 8, 1, serial_ioport_read, s);
@@ -444,7 +447,7 @@ SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque, @@ -444,7 +447,7 @@ SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
444 s->base = base; 447 s->base = base;
445 s->it_shift = it_shift; 448 s->it_shift = it_shift;
446 449
447 - register_savevm("serial", base, 1, serial_save, serial_load, s); 450 + register_savevm("serial", base, 2, serial_save, serial_load, s);
448 451
449 s_io_memory = cpu_register_io_memory(0, serial_mm_read, 452 s_io_memory = cpu_register_io_memory(0, serial_mm_read,
450 serial_mm_write, s); 453 serial_mm_write, s);