Commit 5068cbd9e9ef1bec70b5c04650a12d8d8bb7ff3d
1 parent
2c41a5f9
Write zeros to high bits of y, based on patch by Vince Weaver
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5196 c046a42c-6fe2-441c-8c8c-71466251a162
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4 additions
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2 deletions
target-sparc/translate.c
| @@ -709,7 +709,8 @@ static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2) | @@ -709,7 +709,8 @@ static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2) | ||
| 709 | tcg_gen_andi_tl(r_temp, cpu_cc_src, 0x1); | 709 | tcg_gen_andi_tl(r_temp, cpu_cc_src, 0x1); |
| 710 | tcg_gen_shli_tl(r_temp, r_temp, 31); | 710 | tcg_gen_shli_tl(r_temp, r_temp, 31); |
| 711 | tcg_gen_shri_tl(cpu_tmp0, cpu_y, 1); | 711 | tcg_gen_shri_tl(cpu_tmp0, cpu_y, 1); |
| 712 | - tcg_gen_or_tl(cpu_y, cpu_tmp0, r_temp); | 712 | + tcg_gen_or_tl(cpu_tmp0, cpu_tmp0, r_temp); |
| 713 | + tcg_gen_andi_tl(cpu_y, cpu_tmp0, 0xffffffff); | ||
| 713 | 714 | ||
| 714 | // b1 = N ^ V; | 715 | // b1 = N ^ V; |
| 715 | gen_mov_reg_N(cpu_tmp0, cpu_psr); | 716 | gen_mov_reg_N(cpu_tmp0, cpu_psr); |
| @@ -3195,7 +3196,8 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3195,7 +3196,8 @@ static void disas_sparc_insn(DisasContext * dc) | ||
| 3195 | { | 3196 | { |
| 3196 | switch(rd) { | 3197 | switch(rd) { |
| 3197 | case 0: /* wry */ | 3198 | case 0: /* wry */ |
| 3198 | - tcg_gen_xor_tl(cpu_y, cpu_src1, cpu_src2); | 3199 | + tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2); |
| 3200 | + tcg_gen_andi_tl(cpu_y, cpu_tmp0, 0xffffffff); | ||
| 3199 | break; | 3201 | break; |
| 3200 | #ifndef TARGET_SPARC64 | 3202 | #ifndef TARGET_SPARC64 |
| 3201 | case 0x01 ... 0x0f: /* undefined in the | 3203 | case 0x01 ... 0x0f: /* undefined in the |