Commit 501e23c4e83d059a0281c2d0bb3818c05af09573

Authored by aurel32
1 parent df9247b2

target-ppc: fix TGC type mismatch introduced by r6146

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6147 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 1 additions and 1 deletions
target-ppc/translate.c
@@ -6350,7 +6350,7 @@ static always_inline void gen_##name (DisasContext *ctx) \ @@ -6350,7 +6350,7 @@ static always_inline void gen_##name (DisasContext *ctx) \
6350 TCGv_i32 t0 = tcg_temp_local_new_i32(); \ 6350 TCGv_i32 t0 = tcg_temp_local_new_i32(); \
6351 TCGv_i32 t1 = tcg_temp_local_new_i32(); \ 6351 TCGv_i32 t1 = tcg_temp_local_new_i32(); \
6352 TCGv_i32 t2 = tcg_temp_local_new_i32(); \ 6352 TCGv_i32 t2 = tcg_temp_local_new_i32(); \
6353 - TCGv_i64 t3 = tcg_temp_local_new(); \ 6353 + TCGv_i64 t3 = tcg_temp_local_new_i64(); \
6354 tcg_gen_trunc_i64_i32(t0, cpu_gpr[rA(ctx->opcode)]); \ 6354 tcg_gen_trunc_i64_i32(t0, cpu_gpr[rA(ctx->opcode)]); \
6355 tcg_gen_trunc_i64_i32(t2, cpu_gpr[rB(ctx->opcode)]); \ 6355 tcg_gen_trunc_i64_i32(t2, cpu_gpr[rB(ctx->opcode)]); \
6356 tcg_op(t0, t0, t2); \ 6356 tcg_op(t0, t0, t2); \