gwj / at91sam9263 · Commits

Commit 4ebcf884836887324848291032a385fe0df7b0af

Authored by blueswir1
1 parent e3007e66

Update #defines for PCI vendor and device IDs from OpenBIOS and Linux 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6490 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 8 changed files with 27 additions and 16 deletions
hw/grackle_pci.c
  View file @4ebcf88
@@ -154,10 +154,8 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic) @@ -154,10 +154,8 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic)
154 154
155 #if 0 155 #if 0
156 /* PCI2PCI bridge same values as PearPC - check this */ 156 /* PCI2PCI bridge same values as PearPC - check this */
157 - d->config[0x00] = 0x11; // vendor_id  
158 - d->config[0x01] = 0x10;  
159 - d->config[0x02] = 0x26; // device_id  
160 - d->config[0x03] = 0x00; 157 + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC);
  158 + pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154);
161 d->config[0x08] = 0x02; // revision 159 d->config[0x08] = 0x02; // revision
162 d->config[0x0a] = 0x04; // class_sub = pci2pci 160 d->config[0x0a] = 0x04; // class_sub = pci2pci
163 d->config[0x0b] = 0x06; // class_base = PCI_bridge 161 d->config[0x0b] = 0x06; // class_base = PCI_bridge
hw/ne2000.c
  View file @4ebcf88
@@ -791,7 +791,7 @@ void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn) @@ -791,7 +791,7 @@ void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn)
791 NULL, NULL); 791 NULL, NULL);
792 pci_conf = d->dev.config; 792 pci_conf = d->dev.config;
793 pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REALTEK); 793 pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REALTEK);
794 - pci_config_set_device_id(pci_conf, 0x8029); // Realtek 8029 794 + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REALTEK_RTL8029);
795 pci_conf[0x0a] = 0x00; // ethernet network controller 795 pci_conf[0x0a] = 0x00; // ethernet network controller
796 pci_conf[0x0b] = 0x02; 796 pci_conf[0x0b] = 0x02;
797 pci_conf[0x0e] = 0x00; // header_type 797 pci_conf[0x0e] = 0x00; // header_type
hw/openpic.c
  View file @4ebcf88
@@ -1018,7 +1018,7 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, @@ -1018,7 +1018,7 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
1018 return NULL; 1018 return NULL;
1019 pci_conf = opp->pci_dev.config; 1019 pci_conf = opp->pci_dev.config;
1020 pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM); 1020 pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM);
1021 - pci_config_set_device_id(pci_conf, 0xffff); // MPIC2 1021 + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_IBM_OPENPIC2);
1022 pci_conf[0x0a] = 0x80; // PIC 1022 pci_conf[0x0a] = 0x80; // PIC
1023 pci_conf[0x0b] = 0x08; 1023 pci_conf[0x0b] = 0x08;
1024 pci_conf[0x0e] = 0x00; // header_type 1024 pci_conf[0x0e] = 0x00; // header_type
hw/pci.h
  View file @4ebcf88
@@ -12,10 +12,12 @@ extern target_phys_addr_t pci_mem_base; @@ -12,10 +12,12 @@ extern target_phys_addr_t pci_mem_base;
12 #define PCI_DEVICE_ID_LSI_53C895A 0x0012 12 #define PCI_DEVICE_ID_LSI_53C895A 0x0012
13 13
14 #define PCI_VENDOR_ID_DEC 0x1011 14 #define PCI_VENDOR_ID_DEC 0x1011
  15 +#define PCI_DEVICE_ID_DEC_21154 0x0026
15 16
16 #define PCI_VENDOR_ID_CIRRUS 0x1013 17 #define PCI_VENDOR_ID_CIRRUS 0x1013
17 18
18 #define PCI_VENDOR_ID_IBM 0x1014 19 #define PCI_VENDOR_ID_IBM 0x1014
  20 +#define PCI_DEVICE_ID_IBM_OPENPIC2 0xffff
19 21
20 #define PCI_VENDOR_ID_AMD 0x1022 22 #define PCI_VENDOR_ID_AMD 0x1022
21 #define PCI_DEVICE_ID_AMD_LANCE 0x2000 23 #define PCI_DEVICE_ID_AMD_LANCE 0x2000
@@ -27,7 +29,11 @@ extern target_phys_addr_t pci_mem_base; @@ -27,7 +29,11 @@ extern target_phys_addr_t pci_mem_base;
27 #define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801 29 #define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801
28 30
29 #define PCI_VENDOR_ID_APPLE 0x106b 31 #define PCI_VENDOR_ID_APPLE 0x106b
  32 +#define PCI_DEVICE_ID_APPLE_343S1201 0x0010
  33 +#define PCI_DEVICE_ID_APPLE_UNI_N_I_PCI 0x001e
  34 +#define PCI_DEVICE_ID_APPLE_UNI_N_PCI 0x001f
30 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020 35 #define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020
  36 +#define PCI_DEVICE_ID_APPLE_UNI_N_KEYL 0x0022
31 37
32 #define PCI_VENDOR_ID_SUN 0x108e 38 #define PCI_VENDOR_ID_SUN 0x108e
33 #define PCI_DEVICE_ID_SUN_EBUS 0x1000 39 #define PCI_DEVICE_ID_SUN_EBUS 0x1000
@@ -38,12 +44,16 @@ extern target_phys_addr_t pci_mem_base; @@ -38,12 +44,16 @@ extern target_phys_addr_t pci_mem_base;
38 #define PCI_DEVICE_ID_CMD_646 0x0646 44 #define PCI_DEVICE_ID_CMD_646 0x0646
39 45
40 #define PCI_VENDOR_ID_REALTEK 0x10ec 46 #define PCI_VENDOR_ID_REALTEK 0x10ec
  47 +#define PCI_DEVICE_ID_REALTEK_RTL8029 0x8029
41 #define PCI_DEVICE_ID_REALTEK_8139 0x8139 48 #define PCI_DEVICE_ID_REALTEK_8139 0x8139
42 49
43 #define PCI_VENDOR_ID_XILINX 0x10ee 50 #define PCI_VENDOR_ID_XILINX 0x10ee
44 51
45 #define PCI_VENDOR_ID_MARVELL 0x11ab 52 #define PCI_VENDOR_ID_MARVELL 0x11ab
46 53
  54 +#define PCI_VENDOR_ID_QEMU 0x1234
  55 +#define PCI_DEVICE_ID_QEMU_VGA 0x1111
  56 +
47 #define PCI_VENDOR_ID_ENSONIQ 0x1274 57 #define PCI_VENDOR_ID_ENSONIQ 0x1274
48 #define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000 58 #define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000
49 59
hw/ppc_chrp.c
  View file @4ebcf88
@@ -296,8 +296,9 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size, @@ -296,8 +296,9 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
296 adb_mouse_init(&adb_bus); 296 adb_mouse_init(&adb_bus);
297 297
298 298
299 - macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,  
300 - cuda_mem_index, NULL, 2, ide_mem_index, escc_mem_index); 299 + macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
  300 + dbdma_mem_index, cuda_mem_index, NULL, 2, ide_mem_index,
  301 + escc_mem_index);
301 302
302 if (usb_enabled) { 303 if (usb_enabled) {
303 usb_ohci_init_pci(pci_bus, 3, -1); 304 usb_ohci_init_pci(pci_bus, 3, -1);
hw/ppc_oldworld.c
  View file @4ebcf88
@@ -360,8 +360,9 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size, @@ -360,8 +360,9 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
360 nvr = macio_nvram_init(&nvram_mem_index, 0x2000); 360 nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
361 pmac_format_nvram_partition(nvr, 0x2000); 361 pmac_format_nvram_partition(nvr, 0x2000);
362 362
363 - macio_init(pci_bus, 0x0010, 1, pic_mem_index, dbdma_mem_index,  
364 - cuda_mem_index, nvr, 2, ide_mem_index, escc_mem_index); 363 + macio_init(pci_bus, PCI_DEVICE_ID_APPLE_343S1201, 1, pic_mem_index,
  364 + dbdma_mem_index, cuda_mem_index, nvr, 2, ide_mem_index,
  365 + escc_mem_index);
365 366
366 if (usb_enabled) { 367 if (usb_enabled) {
367 usb_ohci_init_pci(pci_bus, 3, -1); 368 usb_ohci_init_pci(pci_bus, 3, -1);
hw/unin_pci.c
  View file @4ebcf88
@@ -175,7 +175,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic) @@ -175,7 +175,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
175 d = pci_register_device(s->bus, "Uni-north main", sizeof(PCIDevice), 175 d = pci_register_device(s->bus, "Uni-north main", sizeof(PCIDevice),
176 11 << 3, NULL, NULL); 176 11 << 3, NULL, NULL);
177 pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); 177 pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
178 - pci_config_set_device_id(d->config, 0x001f); // device_id 178 + pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_PCI);
179 d->config[0x08] = 0x00; // revision 179 d->config[0x08] = 0x00; // revision
180 d->config[0x0A] = 0x00; // class_sub = pci host 180 d->config[0x0A] = 0x00; // class_sub = pci host
181 d->config[0x0B] = 0x06; // class_base = PCI_bridge 181 d->config[0x0B] = 0x06; // class_base = PCI_bridge
@@ -188,8 +188,8 @@ PCIBus *pci_pmac_init(qemu_irq *pic) @@ -188,8 +188,8 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
188 /* pci-to-pci bridge */ 188 /* pci-to-pci bridge */
189 d = pci_register_device("Uni-north bridge", sizeof(PCIDevice), 0, 13 << 3, 189 d = pci_register_device("Uni-north bridge", sizeof(PCIDevice), 0, 13 << 3,
190 NULL, NULL); 190 NULL, NULL);
191 - pci_config_set_vendor_id(d->config, 0x1011); // vendor_id : TI  
192 - pci_config_set_device_id(d->config, 0x0026); // device_id 191 + pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC);
  192 + pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154);
193 d->config[0x08] = 0x05; // revision 193 d->config[0x08] = 0x05; // revision
194 d->config[0x0A] = 0x04; // class_sub = pci2pci 194 d->config[0x0A] = 0x04; // class_sub = pci2pci
195 d->config[0x0B] = 0x06; // class_base = PCI_bridge 195 d->config[0x0B] = 0x06; // class_base = PCI_bridge
@@ -249,7 +249,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic) @@ -249,7 +249,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
249 d = pci_register_device("Uni-north internal", sizeof(PCIDevice), 249 d = pci_register_device("Uni-north internal", sizeof(PCIDevice),
250 3, 11 << 3, NULL, NULL); 250 3, 11 << 3, NULL, NULL);
251 pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); 251 pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
252 - pci_config_set_device_id(d->config, 0x001E); // device_id 252 + pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_I_PCI);
253 d->config[0x08] = 0x00; // revision 253 d->config[0x08] = 0x00; // revision
254 d->config[0x0A] = 0x00; // class_sub = pci host 254 d->config[0x0A] = 0x00; // class_sub = pci host
255 d->config[0x0B] = 0x06; // class_base = PCI_bridge 255 d->config[0x0B] = 0x06; // class_base = PCI_bridge
hw/vga.c
  View file @4ebcf88
@@ -2510,8 +2510,9 @@ int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base, @@ -2510,8 +2510,9 @@ int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
2510 s->pci_dev = &d->dev; 2510 s->pci_dev = &d->dev;
2511 2511
2512 pci_conf = d->dev.config; 2512 pci_conf = d->dev.config;
2513 - pci_config_set_vendor_id(pci_conf, 0x1234); // dummy VGA (same as Bochs ID)  
2514 - pci_config_set_device_id(pci_conf, 0x1111); 2513 + // dummy VGA (same as Bochs ID)
  2514 + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_QEMU);
  2515 + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_QEMU_VGA);
2515 pci_conf[0x0a] = 0x00; // VGA controller 2516 pci_conf[0x0a] = 0x00; // VGA controller
2516 pci_conf[0x0b] = 0x03; 2517 pci_conf[0x0b] = 0x03;
2517 pci_conf[0x0e] = 0x00; // header_type 2518 pci_conf[0x0e] = 0x00; // header_type