gwj / at91sam9263 · Commits

Commit 4c54e8756839e5ba2812ebe812d3542498a6a8a1

Authored by aurel32
1 parent 50bf72b3

Remember the state of level-triggered interrupts 

(Hollis Blanchard)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4330 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 7 additions and 2 deletions
hw/ppc4xx_devs.c
  View file @4c54e87
... ... @@ -278,6 +278,7 @@ typedef struct ppcuic_t ppcuic_t;
278 278 struct ppcuic_t {
279 279 uint32_t dcr_base;
280 280 int use_vectors;
  281 + uint32_t level; /* Remembers the state of level-triggered interrupts. */
281 282 uint32_t uicsr; /* Status register */
282 283 uint32_t uicer; /* Enable register */
283 284 uint32_t uiccr; /* Critical register */
... ... @@ -385,10 +386,13 @@ static void ppcuic_set_irq (void *opaque, int irq_num, int level)
385 386 uic->uicsr |= mask;
386 387 } else {
387 388 /* Level sensitive interrupt */
388   - if (level == 1)
  389 + if (level == 1) {
389 390 uic->uicsr |= mask;
390   - else
  391 + uic->level |= mask;
  392 + } else {
391 393 uic->uicsr &= ~mask;
  394 + uic->level &= ~mask;
  395 + }
392 396 }
393 397 #ifdef DEBUG_UIC
394 398 if (loglevel & CPU_LOG_INT) {
... ... @@ -460,6 +464,7 @@ static void dcr_write_uic (void *opaque, int dcrn, target_ulong val)
460 464 switch (dcrn) {
461 465 case DCR_UICSR:
462 466 uic->uicsr &= ~val;
  467 + uic->uicsr |= uic->level;
463 468 ppcuic_trigger_irq(uic);
464 469 break;
465 470 case DCR_UICSRS:
... ...