gwj / at91sam9263 · Commits

Commit 4c2485de385c52cbf3cba1bba37c49b99a47e58c

Authored by blueswir1
1 parent f48c537d

Add ID register 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3864 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 13 additions and 1 deletions
hw/sun4m.c
  View file @4c2485d
@@ -70,7 +70,7 @@ struct hwdef { @@ -70,7 +70,7 @@ struct hwdef {
70 target_phys_addr_t iommu_base, slavio_base; 70 target_phys_addr_t iommu_base, slavio_base;
71 target_phys_addr_t intctl_base, counter_base, nvram_base, ms_kb_base; 71 target_phys_addr_t intctl_base, counter_base, nvram_base, ms_kb_base;
72 target_phys_addr_t serial_base, fd_base; 72 target_phys_addr_t serial_base, fd_base;
73 - target_phys_addr_t dma_base, esp_base, le_base; 73 + target_phys_addr_t idreg_base, dma_base, esp_base, le_base;
74 target_phys_addr_t tcx_base, cs_base, power_base; 74 target_phys_addr_t tcx_base, cs_base, power_base;
75 target_phys_addr_t ecc_base; 75 target_phys_addr_t ecc_base;
76 uint32_t ecc_version; 76 uint32_t ecc_version;
@@ -397,6 +397,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int RAM_size, @@ -397,6 +397,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int RAM_size,
397 buf); 397 buf);
398 exit(1); 398 exit(1);
399 } 399 }
  400 + prom_offset += (ret + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
400 401
401 /* set up devices */ 402 /* set up devices */
402 iommu = iommu_init(hwdef->iommu_base, hwdef->iommu_version); 403 iommu = iommu_init(hwdef->iommu_base, hwdef->iommu_version);
@@ -407,6 +408,13 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int RAM_size, @@ -407,6 +408,13 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int RAM_size,
407 cpu_irqs, 408 cpu_irqs,
408 hwdef->clock_irq); 409 hwdef->clock_irq);
409 410
  411 + if (hwdef->idreg_base != (target_phys_addr_t)-1) {
  412 + stl_raw(phys_ram_base + prom_offset, 0xfe810103);
  413 +
  414 + cpu_register_physical_memory(hwdef->idreg_base, sizeof(uint32_t),
  415 + prom_offset | IO_MEM_ROM);
  416 + }
  417 +
410 espdma = sparc32_dma_init(hwdef->dma_base, slavio_irq[hwdef->esp_irq], 418 espdma = sparc32_dma_init(hwdef->dma_base, slavio_irq[hwdef->esp_irq],
411 iommu, &espdma_irq, &esp_reset); 419 iommu, &espdma_irq, &esp_reset);
412 420
@@ -499,6 +507,7 @@ static const struct hwdef hwdefs[] = { @@ -499,6 +507,7 @@ static const struct hwdef hwdefs[] = {
499 .fd_base = 0x71400000, 507 .fd_base = 0x71400000,
500 .counter_base = 0x71d00000, 508 .counter_base = 0x71d00000,
501 .intctl_base = 0x71e00000, 509 .intctl_base = 0x71e00000,
  510 + .idreg_base = 0x78000000,
502 .dma_base = 0x78400000, 511 .dma_base = 0x78400000,
503 .esp_base = 0x78800000, 512 .esp_base = 0x78800000,
504 .le_base = 0x78c00000, 513 .le_base = 0x78c00000,
@@ -536,6 +545,7 @@ static const struct hwdef hwdefs[] = { @@ -536,6 +545,7 @@ static const struct hwdef hwdefs[] = {
536 .fd_base = 0xff1700000ULL, 545 .fd_base = 0xff1700000ULL,
537 .counter_base = 0xff1300000ULL, 546 .counter_base = 0xff1300000ULL,
538 .intctl_base = 0xff1400000ULL, 547 .intctl_base = 0xff1400000ULL,
  548 + .idreg_base = 0xef0000000ULL,
539 .dma_base = 0xef0400000ULL, 549 .dma_base = 0xef0400000ULL,
540 .esp_base = 0xef0800000ULL, 550 .esp_base = 0xef0800000ULL,
541 .le_base = 0xef0c00000ULL, 551 .le_base = 0xef0c00000ULL,
@@ -574,6 +584,7 @@ static const struct hwdef hwdefs[] = { @@ -574,6 +584,7 @@ static const struct hwdef hwdefs[] = {
574 .fd_base = -1, 584 .fd_base = -1,
575 .counter_base = 0xff1300000ULL, 585 .counter_base = 0xff1300000ULL,
576 .intctl_base = 0xff1400000ULL, 586 .intctl_base = 0xff1400000ULL,
  587 + .idreg_base = -1,
577 .dma_base = 0xef0081000ULL, 588 .dma_base = 0xef0081000ULL,
578 .esp_base = 0xef0080000ULL, 589 .esp_base = 0xef0080000ULL,
579 .le_base = 0xef0060000ULL, 590 .le_base = 0xef0060000ULL,
@@ -612,6 +623,7 @@ static const struct hwdef hwdefs[] = { @@ -612,6 +623,7 @@ static const struct hwdef hwdefs[] = {
612 .fd_base = 0xff1700000ULL, 623 .fd_base = 0xff1700000ULL,
613 .counter_base = 0xff1300000ULL, 624 .counter_base = 0xff1300000ULL,
614 .intctl_base = 0xff1400000ULL, 625 .intctl_base = 0xff1400000ULL,
  626 + .idreg_base = 0xef0000000ULL,
615 .dma_base = 0xef0400000ULL, 627 .dma_base = 0xef0400000ULL,
616 .esp_base = 0xef0800000ULL, 628 .esp_base = 0xef0800000ULL,
617 .le_base = 0xef0c00000ULL, 629 .le_base = 0xef0c00000ULL,