gwj / at91sam9263 · Commits

Commit 4bb2fcc7c9776d3a3732dc3731fd1107fb5b8c27

Authored by bellard
1 parent 08cea4ee

gcc 2.95.4 compile fix (Petter Reinholdtsen) 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@683 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 6 additions and 6 deletions
target-i386/translate.c
  View file @4bb2fcc
@@ -391,7 +391,7 @@ static GenOpFunc *gen_op_arith_T0_T1_cc[8] = { @@ -391,7 +391,7 @@ static GenOpFunc *gen_op_arith_T0_T1_cc[8] = {
391 }, 391 },
392 392
393 static GenOpFunc *gen_op_arithc_T0_T1_cc[3][2] = { 393 static GenOpFunc *gen_op_arithc_T0_T1_cc[3][2] = {
394 - DEF_ARITHC() 394 + DEF_ARITHC( )
395 }; 395 };
396 396
397 static GenOpFunc *gen_op_arithc_mem_T0_T1_cc[9][2] = { 397 static GenOpFunc *gen_op_arithc_mem_T0_T1_cc[9][2] = {
@@ -420,7 +420,7 @@ static const int cc_op_arithb[8] = { @@ -420,7 +420,7 @@ static const int cc_op_arithb[8] = {
420 420
421 421
422 static GenOpFunc *gen_op_cmpxchg_T0_T1_EAX_cc[3] = { 422 static GenOpFunc *gen_op_cmpxchg_T0_T1_EAX_cc[3] = {
423 - DEF_CMPXCHG() 423 + DEF_CMPXCHG( )
424 }; 424 };
425 425
426 static GenOpFunc *gen_op_cmpxchg_mem_T0_T1_EAX_cc[9] = { 426 static GenOpFunc *gen_op_cmpxchg_mem_T0_T1_EAX_cc[9] = {
@@ -464,7 +464,7 @@ static GenOpFunc *gen_op_cmpxchg_mem_T0_T1_EAX_cc[9] = { @@ -464,7 +464,7 @@ static GenOpFunc *gen_op_cmpxchg_mem_T0_T1_EAX_cc[9] = {
464 }, 464 },
465 465
466 static GenOpFunc *gen_op_shift_T0_T1_cc[3][8] = { 466 static GenOpFunc *gen_op_shift_T0_T1_cc[3][8] = {
467 - DEF_SHIFT() 467 + DEF_SHIFT( )
468 }; 468 };
469 469
470 static GenOpFunc *gen_op_shift_mem_T0_T1_cc[9][8] = { 470 static GenOpFunc *gen_op_shift_mem_T0_T1_cc[9][8] = {
@@ -4277,7 +4277,7 @@ static uint16_t opc_read_flags[NB_OPS] = { @@ -4277,7 +4277,7 @@ static uint16_t opc_read_flags[NB_OPS] = {
4277 [INDEX_op_rcrl ## SUFFIX ## _T0_T1_cc] = CC_C, 4277 [INDEX_op_rcrl ## SUFFIX ## _T0_T1_cc] = CC_C,
4278 4278
4279 4279
4280 - DEF_READF() 4280 + DEF_READF( )
4281 DEF_READF(_raw) 4281 DEF_READF(_raw)
4282 #ifndef CONFIG_USER_ONLY 4282 #ifndef CONFIG_USER_ONLY
4283 DEF_READF(_kernel) 4283 DEF_READF(_kernel)
@@ -4396,7 +4396,7 @@ static uint16_t opc_write_flags[NB_OPS] = { @@ -4396,7 +4396,7 @@ static uint16_t opc_write_flags[NB_OPS] = {
4396 [INDEX_op_cmpxchgl ## SUFFIX ## _T0_T1_EAX_cc] = CC_OSZAPC, 4396 [INDEX_op_cmpxchgl ## SUFFIX ## _T0_T1_EAX_cc] = CC_OSZAPC,
4397 4397
4398 4398
4399 - DEF_WRITEF() 4399 + DEF_WRITEF( )
4400 DEF_WRITEF(_raw) 4400 DEF_WRITEF(_raw)
4401 #ifndef CONFIG_USER_ONLY 4401 #ifndef CONFIG_USER_ONLY
4402 DEF_WRITEF(_kernel) 4402 DEF_WRITEF(_kernel)
@@ -4435,7 +4435,7 @@ static uint16_t opc_simpler[NB_OPS] = { @@ -4435,7 +4435,7 @@ static uint16_t opc_simpler[NB_OPS] = {
4435 [INDEX_op_rorw ## SUFFIX ## _T0_T1_cc] = INDEX_op_rorw ## SUFFIX ## _T0_T1,\ 4435 [INDEX_op_rorw ## SUFFIX ## _T0_T1_cc] = INDEX_op_rorw ## SUFFIX ## _T0_T1,\
4436 [INDEX_op_rorl ## SUFFIX ## _T0_T1_cc] = INDEX_op_rorl ## SUFFIX ## _T0_T1, 4436 [INDEX_op_rorl ## SUFFIX ## _T0_T1_cc] = INDEX_op_rorl ## SUFFIX ## _T0_T1,
4437 4437
4438 - DEF_SIMPLER() 4438 + DEF_SIMPLER( )
4439 DEF_SIMPLER(_raw) 4439 DEF_SIMPLER(_raw)
4440 #ifndef CONFIG_USER_ONLY 4440 #ifndef CONFIG_USER_ONLY
4441 DEF_SIMPLER(_kernel) 4441 DEF_SIMPLER(_kernel)