Commit 4b19ec0c2be507954352fdcc7172737c46348476

Authored by bellard
1 parent e3888186

spelling fixes


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1104 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 17 additions and 17 deletions
hw/fdc.c
@@ -309,7 +309,7 @@ static void fd_reset (fdrive_t *drv) @@ -309,7 +309,7 @@ static void fd_reset (fdrive_t *drv)
309 } 309 }
310 310
311 /********************************************************/ 311 /********************************************************/
312 -/* Intel 82078 floppy disk controler emulation */ 312 +/* Intel 82078 floppy disk controller emulation */
313 313
314 static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq); 314 static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq);
315 static void fdctrl_reset_fifo (fdctrl_t *fdctrl); 315 static void fdctrl_reset_fifo (fdctrl_t *fdctrl);
@@ -363,13 +363,13 @@ do { (state) = ((state) & ~FD_STATE_STATE) | (new_state); } while (0) @@ -363,13 +363,13 @@ do { (state) = ((state) & ~FD_STATE_STATE) | (new_state); } while (0)
363 363
364 struct fdctrl_t { 364 struct fdctrl_t {
365 fdctrl_t *fdctrl; 365 fdctrl_t *fdctrl;
366 - /* Controler's identification */ 366 + /* Controller's identification */
367 uint8_t version; 367 uint8_t version;
368 /* HW */ 368 /* HW */
369 int irq_lvl; 369 int irq_lvl;
370 int dma_chann; 370 int dma_chann;
371 uint32_t io_base; 371 uint32_t io_base;
372 - /* Controler state */ 372 + /* Controller state */
373 QEMUTimer *result_timer; 373 QEMUTimer *result_timer;
374 uint8_t state; 374 uint8_t state;
375 uint8_t dma_en; 375 uint8_t dma_en;
@@ -475,14 +475,14 @@ fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, @@ -475,14 +475,14 @@ fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
475 // int io_mem; 475 // int io_mem;
476 int i; 476 int i;
477 477
478 - FLOPPY_DPRINTF("init controler\n"); 478 + FLOPPY_DPRINTF("init controller\n");
479 fdctrl = qemu_mallocz(sizeof(fdctrl_t)); 479 fdctrl = qemu_mallocz(sizeof(fdctrl_t));
480 if (!fdctrl) 480 if (!fdctrl)
481 return NULL; 481 return NULL;
482 fdctrl->result_timer = qemu_new_timer(vm_clock, 482 fdctrl->result_timer = qemu_new_timer(vm_clock,
483 fdctrl_result_timer, fdctrl); 483 fdctrl_result_timer, fdctrl);
484 484
485 - fdctrl->version = 0x90; /* Intel 82078 controler */ 485 + fdctrl->version = 0x90; /* Intel 82078 controller */
486 fdctrl->irq_lvl = irq_lvl; 486 fdctrl->irq_lvl = irq_lvl;
487 fdctrl->dma_chann = dma_chann; 487 fdctrl->dma_chann = dma_chann;
488 fdctrl->io_base = io_base; 488 fdctrl->io_base = io_base;
@@ -545,14 +545,14 @@ static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status) @@ -545,14 +545,14 @@ static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status)
545 fdctrl->int_status = status; 545 fdctrl->int_status = status;
546 } 546 }
547 547
548 -/* Reset controler */ 548 +/* Reset controller */
549 static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq) 549 static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq)
550 { 550 {
551 int i; 551 int i;
552 552
553 - FLOPPY_DPRINTF("reset controler\n"); 553 + FLOPPY_DPRINTF("reset controller\n");
554 fdctrl_reset_irq(fdctrl); 554 fdctrl_reset_irq(fdctrl);
555 - /* Initialise controler */ 555 + /* Initialise controller */
556 fdctrl->cur_drv = 0; 556 fdctrl->cur_drv = 0;
557 /* FIFO state */ 557 /* FIFO state */
558 fdctrl->data_pos = 0; 558 fdctrl->data_pos = 0;
@@ -614,7 +614,7 @@ static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value) @@ -614,7 +614,7 @@ static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value)
614 /* Reset mode */ 614 /* Reset mode */
615 if (fdctrl->state & FD_CTRL_RESET) { 615 if (fdctrl->state & FD_CTRL_RESET) {
616 if (!(value & 0x04)) { 616 if (!(value & 0x04)) {
617 - FLOPPY_DPRINTF("Floppy controler in RESET state !\n"); 617 + FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
618 return; 618 return;
619 } 619 }
620 } 620 }
@@ -636,12 +636,12 @@ static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value) @@ -636,12 +636,12 @@ static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value)
636 /* Reset */ 636 /* Reset */
637 if (!(value & 0x04)) { 637 if (!(value & 0x04)) {
638 if (!(fdctrl->state & FD_CTRL_RESET)) { 638 if (!(fdctrl->state & FD_CTRL_RESET)) {
639 - FLOPPY_DPRINTF("controler enter RESET state\n"); 639 + FLOPPY_DPRINTF("controller enter RESET state\n");
640 fdctrl->state |= FD_CTRL_RESET; 640 fdctrl->state |= FD_CTRL_RESET;
641 } 641 }
642 } else { 642 } else {
643 if (fdctrl->state & FD_CTRL_RESET) { 643 if (fdctrl->state & FD_CTRL_RESET) {
644 - FLOPPY_DPRINTF("controler out of RESET state\n"); 644 + FLOPPY_DPRINTF("controller out of RESET state\n");
645 fdctrl_reset(fdctrl, 1); 645 fdctrl_reset(fdctrl, 1);
646 fdctrl->state &= ~(FD_CTRL_RESET | FD_CTRL_SLEEP); 646 fdctrl->state &= ~(FD_CTRL_RESET | FD_CTRL_SLEEP);
647 } 647 }
@@ -667,7 +667,7 @@ static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value) @@ -667,7 +667,7 @@ static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value)
667 { 667 {
668 /* Reset mode */ 668 /* Reset mode */
669 if (fdctrl->state & FD_CTRL_RESET) { 669 if (fdctrl->state & FD_CTRL_RESET) {
670 - FLOPPY_DPRINTF("Floppy controler in RESET state !\n"); 670 + FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
671 return; 671 return;
672 } 672 }
673 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value); 673 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
@@ -704,7 +704,7 @@ static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value) @@ -704,7 +704,7 @@ static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value)
704 { 704 {
705 /* Reset mode */ 705 /* Reset mode */
706 if (fdctrl->state & FD_CTRL_RESET) { 706 if (fdctrl->state & FD_CTRL_RESET) {
707 - FLOPPY_DPRINTF("Floppy controler in RESET state !\n"); 707 + FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
708 return; 708 return;
709 } 709 }
710 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value); 710 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
@@ -811,7 +811,7 @@ static void fdctrl_start_transfer (fdctrl_t *fdctrl, int direction) @@ -811,7 +811,7 @@ static void fdctrl_start_transfer (fdctrl_t *fdctrl, int direction)
811 kt = fdctrl->fifo[2]; 811 kt = fdctrl->fifo[2];
812 kh = fdctrl->fifo[3]; 812 kh = fdctrl->fifo[3];
813 ks = fdctrl->fifo[4]; 813 ks = fdctrl->fifo[4];
814 - FLOPPY_DPRINTF("Start tranfer at %d %d %02x %02x (%d)\n", 814 + FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
815 fdctrl->cur_drv, kh, kt, ks, 815 fdctrl->cur_drv, kh, kt, ks,
816 _fd_sector(kh, kt, ks, cur_drv->last_sect)); 816 _fd_sector(kh, kt, ks, cur_drv->last_sect));
817 did_seek = 0; 817 did_seek = 0;
@@ -881,7 +881,7 @@ static void fdctrl_start_transfer (fdctrl_t *fdctrl, int direction) @@ -881,7 +881,7 @@ static void fdctrl_start_transfer (fdctrl_t *fdctrl, int direction)
881 (direction == FD_DIR_READ && dma_mode == 1)) { 881 (direction == FD_DIR_READ && dma_mode == 1)) {
882 /* No access is allowed until DMA transfer has completed */ 882 /* No access is allowed until DMA transfer has completed */
883 fdctrl->state |= FD_CTRL_BUSY; 883 fdctrl->state |= FD_CTRL_BUSY;
884 - /* Now, we just have to wait for the DMA controler to 884 + /* Now, we just have to wait for the DMA controller to
885 * recall us... 885 * recall us...
886 */ 886 */
887 DMA_hold_DREQ(fdctrl->dma_chann); 887 DMA_hold_DREQ(fdctrl->dma_chann);
@@ -1159,7 +1159,7 @@ static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value) @@ -1159,7 +1159,7 @@ static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value)
1159 cur_drv = get_cur_drv(fdctrl); 1159 cur_drv = get_cur_drv(fdctrl);
1160 /* Reset mode */ 1160 /* Reset mode */
1161 if (fdctrl->state & FD_CTRL_RESET) { 1161 if (fdctrl->state & FD_CTRL_RESET) {
1162 - FLOPPY_DPRINTF("Floppy controler in RESET state !\n"); 1162 + FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1163 return; 1163 return;
1164 } 1164 }
1165 fdctrl->state &= ~FD_CTRL_SLEEP; 1165 fdctrl->state &= ~FD_CTRL_SLEEP;
@@ -1300,7 +1300,7 @@ static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value) @@ -1300,7 +1300,7 @@ static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value)
1300 /* VERSION */ 1300 /* VERSION */
1301 FLOPPY_DPRINTF("VERSION command\n"); 1301 FLOPPY_DPRINTF("VERSION command\n");
1302 /* No parameters cmd */ 1302 /* No parameters cmd */
1303 - /* Controler's version */ 1303 + /* Controller's version */
1304 fdctrl->fifo[0] = fdctrl->version; 1304 fdctrl->fifo[0] = fdctrl->version;
1305 fdctrl_set_fifo(fdctrl, 1, 1); 1305 fdctrl_set_fifo(fdctrl, 1, 1);
1306 return; 1306 return;