gwj / at91sam9263 · Commits

Commit 4aed2c33eb0e2c98db0d6a6ad13997651fad06bf

Authored by blueswir1
1 parent 9ed1e667

M48T02 support (Robert Reif) 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3872 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 40 additions and 15 deletions
hw/m48t59.c
  View file @4aed2c3
... ... @@ -36,13 +36,13 @@
36 36 #endif
37 37  
38 38 /*
39   - * The M48T08 and M48T59 chips are very similar. The newer '59 has
  39 + * The M48T02, M48T08 and M48T59 chips are very similar. The newer '59 has
40 40 * alarm and a watchdog timer and related control registers. In the
41 41 * PPC platform there is also a nvram lock function.
42 42 */
43 43 struct m48t59_t {
44 44 /* Model parameters */
45   - int type; // 8 = m48t08, 59 = m48t59
  45 + int type; // 2 = m48t02, 8 = m48t08, 59 = m48t59
46 46 /* Hardware parameters */
47 47 qemu_irq IRQ;
48 48 int mem_index;
... ... @@ -210,9 +210,14 @@ void m48t59_write (void *opaque, uint32_t addr, uint32_t val)
210 210  
211 211 if (addr > 0x1FF8 && addr < 0x2000)
212 212 NVRAM_PRINTF("%s: 0x%08x => 0x%08x\n", __func__, addr, val);
213   - if (NVRAM->type == 8 &&
214   - (addr >= 0x1ff0 && addr <= 0x1ff7))
  213 +
  214 + /* check for NVRAM access */
  215 + if ((NVRAM->type == 2 && addr < 0x7f8) ||
  216 + (NVRAM->type == 8 && addr < 0x1ff8) ||
  217 + (NVRAM->type == 59 && addr < 0x1ff0))
215 218 goto do_write;
  219 +
  220 + /* TOD access */
216 221 switch (addr) {
217 222 case 0x1FF0:
218 223 /* flags register : read-only */
... ... @@ -270,10 +275,12 @@ void m48t59_write (void *opaque, uint32_t addr, uint32_t val)
270 275 set_up_watchdog(NVRAM, val);
271 276 break;
272 277 case 0x1FF8:
  278 + case 0x07F8:
273 279 /* control */
274   - NVRAM->buffer[0x1FF8] = (val & ~0xA0) | 0x90;
  280 + NVRAM->buffer[addr] = (val & ~0xA0) | 0x90;
275 281 break;
276 282 case 0x1FF9:
  283 + case 0x07F9:
277 284 /* seconds (BCD) */
278 285 tmp = fromBCD(val & 0x7F);
279 286 if (tmp >= 0 && tmp <= 59) {
... ... @@ -281,7 +288,7 @@ void m48t59_write (void *opaque, uint32_t addr, uint32_t val)
281 288 tm.tm_sec = tmp;
282 289 set_time(NVRAM, &tm);
283 290 }
284   - if ((val & 0x80) ^ (NVRAM->buffer[0x1FF9] & 0x80)) {
  291 + if ((val & 0x80) ^ (NVRAM->buffer[addr] & 0x80)) {
285 292 if (val & 0x80) {
286 293 NVRAM->stop_time = time(NULL);
287 294 } else {
... ... @@ -289,9 +296,10 @@ void m48t59_write (void *opaque, uint32_t addr, uint32_t val)
289 296 NVRAM->stop_time = 0;
290 297 }
291 298 }
292   - NVRAM->buffer[0x1FF9] = val & 0x80;
  299 + NVRAM->buffer[addr] = val & 0x80;
293 300 break;
294 301 case 0x1FFA:
  302 + case 0x07FA:
295 303 /* minutes (BCD) */
296 304 tmp = fromBCD(val & 0x7F);
297 305 if (tmp >= 0 && tmp <= 59) {
... ... @@ -301,6 +309,7 @@ void m48t59_write (void *opaque, uint32_t addr, uint32_t val)
301 309 }
302 310 break;
303 311 case 0x1FFB:
  312 + case 0x07FB:
304 313 /* hours (BCD) */
305 314 tmp = fromBCD(val & 0x3F);
306 315 if (tmp >= 0 && tmp <= 23) {
... ... @@ -310,14 +319,16 @@ void m48t59_write (void *opaque, uint32_t addr, uint32_t val)
310 319 }
311 320 break;
312 321 case 0x1FFC:
  322 + case 0x07FC:
313 323 /* day of the week / century */
314 324 tmp = fromBCD(val & 0x07);
315 325 get_time(NVRAM, &tm);
316 326 tm.tm_wday = tmp;
317 327 set_time(NVRAM, &tm);
318   - NVRAM->buffer[0x1FFC] = val & 0x40;
  328 + NVRAM->buffer[addr] = val & 0x40;
319 329 break;
320 330 case 0x1FFD:
  331 + case 0x07FD:
321 332 /* date */
322 333 tmp = fromBCD(val & 0x1F);
323 334 if (tmp != 0) {
... ... @@ -327,6 +338,7 @@ void m48t59_write (void *opaque, uint32_t addr, uint32_t val)
327 338 }
328 339 break;
329 340 case 0x1FFE:
  341 + case 0x07FE:
330 342 /* month */
331 343 tmp = fromBCD(val & 0x1F);
332 344 if (tmp >= 1 && tmp <= 12) {
... ... @@ -336,6 +348,7 @@ void m48t59_write (void *opaque, uint32_t addr, uint32_t val)
336 348 }
337 349 break;
338 350 case 0x1FFF:
  351 + case 0x07FF:
339 352 /* year */
340 353 tmp = fromBCD(val);
341 354 if (tmp >= 0 && tmp <= 99) {
... ... @@ -367,9 +380,13 @@ uint32_t m48t59_read (void *opaque, uint32_t addr)
367 380 struct tm tm;
368 381 uint32_t retval = 0xFF;
369 382  
370   - if (NVRAM->type == 8 &&
371   - (addr >= 0x1ff0 && addr <= 0x1ff7))
  383 + /* check for NVRAM access */
  384 + if ((NVRAM->type == 2 && addr < 0x078f) ||
  385 + (NVRAM->type == 8 && addr < 0x1ff8) ||
  386 + (NVRAM->type == 59 && addr < 0x1ff0))
372 387 goto do_read;
  388 +
  389 + /* TOD access */
373 390 switch (addr) {
374 391 case 0x1FF0:
375 392 /* flags register */
... ... @@ -398,39 +415,47 @@ uint32_t m48t59_read (void *opaque, uint32_t addr)
398 415 set_up_watchdog(NVRAM, NVRAM->buffer[0x1FF7]);
399 416 goto do_read;
400 417 case 0x1FF8:
  418 + case 0x07F8:
401 419 /* control */
402 420 goto do_read;
403 421 case 0x1FF9:
  422 + case 0x07F9:
404 423 /* seconds (BCD) */
405 424 get_time(NVRAM, &tm);
406   - retval = (NVRAM->buffer[0x1FF9] & 0x80) | toBCD(tm.tm_sec);
  425 + retval = (NVRAM->buffer[addr] & 0x80) | toBCD(tm.tm_sec);
407 426 break;
408 427 case 0x1FFA:
  428 + case 0x07FA:
409 429 /* minutes (BCD) */
410 430 get_time(NVRAM, &tm);
411 431 retval = toBCD(tm.tm_min);
412 432 break;
413 433 case 0x1FFB:
  434 + case 0x07FB:
414 435 /* hours (BCD) */
415 436 get_time(NVRAM, &tm);
416 437 retval = toBCD(tm.tm_hour);
417 438 break;
418 439 case 0x1FFC:
  440 + case 0x07FC:
419 441 /* day of the week / century */
420 442 get_time(NVRAM, &tm);
421   - retval = NVRAM->buffer[0x1FFC] | tm.tm_wday;
  443 + retval = NVRAM->buffer[addr] | tm.tm_wday;
422 444 break;
423 445 case 0x1FFD:
  446 + case 0x07FD:
424 447 /* date */
425 448 get_time(NVRAM, &tm);
426 449 retval = toBCD(tm.tm_mday);
427 450 break;
428 451 case 0x1FFE:
  452 + case 0x07FE:
429 453 /* month */
430 454 get_time(NVRAM, &tm);
431 455 retval = toBCD(tm.tm_mon + 1);
432 456 break;
433 457 case 0x1FFF:
  458 + case 0x07FF:
434 459 /* year */
435 460 get_time(NVRAM, &tm);
436 461 if (NVRAM->type == 8)
... ... @@ -650,7 +675,7 @@ m48t59_t *m48t59_init (qemu_irq IRQ, target_phys_addr_t mem_base,
650 675 }
651 676 if (mem_base != 0) {
652 677 s->mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s);
653   - cpu_register_physical_memory(mem_base, 0x4000, s->mem_index);
  678 + cpu_register_physical_memory(mem_base, size, s->mem_index);
654 679 }
655 680 if (type == 59) {
656 681 s->alrm_timer = qemu_new_timer(vm_clock, &alarm_cb, s);
... ...
hw/sun4m.c
  View file @4aed2c3
... ... @@ -623,7 +623,7 @@ static void sun4c_hw_init(const struct hwdef *hwdef, int RAM_size,
623 623 }
624 624  
625 625 nvram = m48t59_init(slavio_irq[0], hwdef->nvram_base, 0,
626   - hwdef->nvram_size, 8);
  626 + hwdef->nvram_size, 2);
627 627  
628 628 slavio_serial_ms_kbd_init(hwdef->ms_kb_base, slavio_irq[hwdef->ms_kb_irq],
629 629 nographic);
... ... @@ -848,7 +848,7 @@ static const struct hwdef hwdefs[] = {
848 848 .sun4c_intctl_base = 0xf5000000,
849 849 .sun4c_counter_base = 0xf3000000,
850 850 .vram_size = 0x00100000,
851   - .nvram_size = 0x2000, // XXX 0x800,
  851 + .nvram_size = 0x800,
852 852 .esp_irq = 2,
853 853 .le_irq = 3,
854 854 .clock_irq = 5,
... ...