Commit 4aa9aca4c25605bcc97a167f8f808a1ec5d34259
1 parent
116842ee
Remove arm's local not_i32 tcg op now that there's one in tcg.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4475 c046a42c-6fe2-441c-8c8c-71466251a162
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target-arm/translate.c
| ... | ... | @@ -451,12 +451,6 @@ static void gen_sub_carry(TCGv dest, TCGv t0, TCGv t1) |
| 451 | 451 | #define gen_sbc_T0_T1() gen_sub_carry(cpu_T[0], cpu_T[0], cpu_T[1]) |
| 452 | 452 | #define gen_rsc_T0_T1() gen_sub_carry(cpu_T[0], cpu_T[1], cpu_T[0]) |
| 453 | 453 | |
| 454 | -/* FIXME: Implement this natively. */ | |
| 455 | -static inline void tcg_gen_not_i32(TCGv t0, TCGv t1) | |
| 456 | -{ | |
| 457 | - tcg_gen_xori_i32(t0, t1, ~0); | |
| 458 | -} | |
| 459 | - | |
| 460 | 454 | /* T0 &= ~T1. Clobbers T1. */ |
| 461 | 455 | /* FIXME: Implement bic natively. */ |
| 462 | 456 | static inline void tcg_gen_bic_i32(TCGv dest, TCGv t0, TCGv t1) | ... | ... |