Commit 49c47daa3221aaf3765e9fb77cb98e62a55b7bf8

Authored by Sebastian Herbszt
Committed by Anthony Liguori
1 parent 4b9a2d6d

lsi53c895a: Implement write access to DMA Byte Counter

Adds CASE_SET_REG24 and fixes the following errors:

lsi_scsi: error: Unhandled writeb 0x24 = 0x0
lsi_scsi: error: Unhandled writeb 0x25 = 0x0

Signed-off-by: Sebastian Herbszt <herbszt@gmx.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Showing 1 changed file with 7 additions and 0 deletions
hw/lsi53c895a.c
... ... @@ -1492,6 +1492,11 @@ static uint8_t lsi_reg_readb(LSIState *s, int offset)
1492 1492  
1493 1493 static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
1494 1494 {
  1495 +#define CASE_SET_REG24(name, addr) \
  1496 + case addr : s->name &= 0xffffff00; s->name |= val; break; \
  1497 + case addr + 1: s->name &= 0xffff00ff; s->name |= val << 8; break; \
  1498 + case addr + 2: s->name &= 0xff00ffff; s->name |= val << 16; break;
  1499 +
1495 1500 #define CASE_SET_REG32(name, addr) \
1496 1501 case addr : s->name &= 0xffffff00; s->name |= val; break; \
1497 1502 case addr + 1: s->name &= 0xffff00ff; s->name |= val << 8; break; \
... ... @@ -1596,6 +1601,7 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
1596 1601 }
1597 1602 s->ctest5 = val;
1598 1603 break;
  1604 + CASE_SET_REG24(dbc, 0x24)
1599 1605 CASE_SET_REG32(dnad, 0x28)
1600 1606 case 0x2c: /* DSP[0:7] */
1601 1607 s->dsp &= 0xffffff00;
... ... @@ -1710,6 +1716,7 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val)
1710 1716 BADF("Unhandled writeb 0x%x = 0x%x\n", offset, val);
1711 1717 }
1712 1718 }
  1719 +#undef CASE_SET_REG24
1713 1720 #undef CASE_SET_REG32
1714 1721 }
1715 1722  
... ...