Commit 49be80301540be4445b2dc58d050a063988c85b4
1 parent
8df1cd07
endianness fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1250 c046a42c-6fe2-441c-8c8c-71466251a162
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2 changed files
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18 additions
and
29 deletions
target-sparc/helper.c
| @@ -129,8 +129,7 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot, | @@ -129,8 +129,7 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot, | ||
| 129 | /* SPARC reference MMU table walk: Context table->L1->L2->PTE */ | 129 | /* SPARC reference MMU table walk: Context table->L1->L2->PTE */ |
| 130 | /* Context base + context number */ | 130 | /* Context base + context number */ |
| 131 | pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 4); | 131 | pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 4); |
| 132 | - cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4); | ||
| 133 | - bswap32s(&pde); | 132 | + pde = ldl_phys(pde_ptr); |
| 134 | 133 | ||
| 135 | /* Ctx pde */ | 134 | /* Ctx pde */ |
| 136 | switch (pde & PTE_ENTRYTYPE_MASK) { | 135 | switch (pde & PTE_ENTRYTYPE_MASK) { |
| @@ -142,8 +141,7 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot, | @@ -142,8 +141,7 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot, | ||
| 142 | return 4; | 141 | return 4; |
| 143 | case 1: /* L0 PDE */ | 142 | case 1: /* L0 PDE */ |
| 144 | pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4); | 143 | pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4); |
| 145 | - cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4); | ||
| 146 | - bswap32s(&pde); | 144 | + pde = ldl_phys(pde_ptr); |
| 147 | 145 | ||
| 148 | switch (pde & PTE_ENTRYTYPE_MASK) { | 146 | switch (pde & PTE_ENTRYTYPE_MASK) { |
| 149 | default: | 147 | default: |
| @@ -153,8 +151,7 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot, | @@ -153,8 +151,7 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot, | ||
| 153 | return 4; | 151 | return 4; |
| 154 | case 1: /* L1 PDE */ | 152 | case 1: /* L1 PDE */ |
| 155 | pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4); | 153 | pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4); |
| 156 | - cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4); | ||
| 157 | - bswap32s(&pde); | 154 | + pde = ldl_phys(pde_ptr); |
| 158 | 155 | ||
| 159 | switch (pde & PTE_ENTRYTYPE_MASK) { | 156 | switch (pde & PTE_ENTRYTYPE_MASK) { |
| 160 | default: | 157 | default: |
| @@ -164,8 +161,7 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot, | @@ -164,8 +161,7 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot, | ||
| 164 | return 4; | 161 | return 4; |
| 165 | case 1: /* L2 PDE */ | 162 | case 1: /* L2 PDE */ |
| 166 | pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4); | 163 | pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4); |
| 167 | - cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4); | ||
| 168 | - bswap32s(&pde); | 164 | + pde = ldl_phys(pde_ptr); |
| 169 | 165 | ||
| 170 | switch (pde & PTE_ENTRYTYPE_MASK) { | 166 | switch (pde & PTE_ENTRYTYPE_MASK) { |
| 171 | default: | 167 | default: |
| @@ -193,12 +189,10 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot, | @@ -193,12 +189,10 @@ int get_physical_address (CPUState *env, uint32_t *physical, int *prot, | ||
| 193 | /* update page modified and dirty bits */ | 189 | /* update page modified and dirty bits */ |
| 194 | is_dirty = (rw & 1) && !(pde & PG_MODIFIED_MASK); | 190 | is_dirty = (rw & 1) && !(pde & PG_MODIFIED_MASK); |
| 195 | if (!(pde & PG_ACCESSED_MASK) || is_dirty) { | 191 | if (!(pde & PG_ACCESSED_MASK) || is_dirty) { |
| 196 | - uint32_t tmppde; | ||
| 197 | pde |= PG_ACCESSED_MASK; | 192 | pde |= PG_ACCESSED_MASK; |
| 198 | if (is_dirty) | 193 | if (is_dirty) |
| 199 | pde |= PG_MODIFIED_MASK; | 194 | pde |= PG_MODIFIED_MASK; |
| 200 | - tmppde = bswap32(pde); | ||
| 201 | - cpu_physical_memory_write(pde_ptr, (uint8_t *)&tmppde, 4); | 195 | + stl_phys_notdirty(pde_ptr, pde); |
| 202 | } | 196 | } |
| 203 | /* check access */ | 197 | /* check access */ |
| 204 | *access_index = ((rw & 1) << 2) | (rw & 2) | (is_user? 0 : 1); | 198 | *access_index = ((rw & 1) << 2) | (rw & 2) | (is_user? 0 : 1); |
| @@ -356,8 +350,8 @@ uint32_t mmu_probe(uint32_t address, int mmulev) | @@ -356,8 +350,8 @@ uint32_t mmu_probe(uint32_t address, int mmulev) | ||
| 356 | 350 | ||
| 357 | /* Context base + context number */ | 351 | /* Context base + context number */ |
| 358 | pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 4); | 352 | pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 4); |
| 359 | - cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4); | ||
| 360 | - bswap32s(&pde); | 353 | + pde = ldl_phys(pde_ptr); |
| 354 | + | ||
| 361 | switch (pde & PTE_ENTRYTYPE_MASK) { | 355 | switch (pde & PTE_ENTRYTYPE_MASK) { |
| 362 | default: | 356 | default: |
| 363 | case 0: /* Invalid */ | 357 | case 0: /* Invalid */ |
| @@ -368,8 +362,7 @@ uint32_t mmu_probe(uint32_t address, int mmulev) | @@ -368,8 +362,7 @@ uint32_t mmu_probe(uint32_t address, int mmulev) | ||
| 368 | if (mmulev == 3) | 362 | if (mmulev == 3) |
| 369 | return pde; | 363 | return pde; |
| 370 | pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4); | 364 | pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4); |
| 371 | - cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4); | ||
| 372 | - bswap32s(&pde); | 365 | + pde = ldl_phys(pde_ptr); |
| 373 | 366 | ||
| 374 | switch (pde & PTE_ENTRYTYPE_MASK) { | 367 | switch (pde & PTE_ENTRYTYPE_MASK) { |
| 375 | default: | 368 | default: |
| @@ -382,8 +375,7 @@ uint32_t mmu_probe(uint32_t address, int mmulev) | @@ -382,8 +375,7 @@ uint32_t mmu_probe(uint32_t address, int mmulev) | ||
| 382 | if (mmulev == 2) | 375 | if (mmulev == 2) |
| 383 | return pde; | 376 | return pde; |
| 384 | pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4); | 377 | pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4); |
| 385 | - cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4); | ||
| 386 | - bswap32s(&pde); | 378 | + pde = ldl_phys(pde_ptr); |
| 387 | 379 | ||
| 388 | switch (pde & PTE_ENTRYTYPE_MASK) { | 380 | switch (pde & PTE_ENTRYTYPE_MASK) { |
| 389 | default: | 381 | default: |
| @@ -396,8 +388,7 @@ uint32_t mmu_probe(uint32_t address, int mmulev) | @@ -396,8 +388,7 @@ uint32_t mmu_probe(uint32_t address, int mmulev) | ||
| 396 | if (mmulev == 1) | 388 | if (mmulev == 1) |
| 397 | return pde; | 389 | return pde; |
| 398 | pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4); | 390 | pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4); |
| 399 | - cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4); | ||
| 400 | - bswap32s(&pde); | 391 | + pde = ldl_phys(pde_ptr); |
| 401 | 392 | ||
| 402 | switch (pde & PTE_ENTRYTYPE_MASK) { | 393 | switch (pde & PTE_ENTRYTYPE_MASK) { |
| 403 | default: | 394 | default: |
| @@ -424,8 +415,7 @@ void dump_mmu(void) | @@ -424,8 +415,7 @@ void dump_mmu(void) | ||
| 424 | 415 | ||
| 425 | printf("MMU dump:\n"); | 416 | printf("MMU dump:\n"); |
| 426 | pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 4); | 417 | pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 4); |
| 427 | - cpu_physical_memory_read(pde_ptr, (uint8_t *)&pde, 4); | ||
| 428 | - bswap32s(&pde); | 418 | + pde = ldl_phys(pde_ptr); |
| 429 | printf("Root ptr: 0x%08x, ctx: %d\n", env->mmuregs[1] << 4, env->mmuregs[2]); | 419 | printf("Root ptr: 0x%08x, ctx: %d\n", env->mmuregs[1] << 4, env->mmuregs[2]); |
| 430 | for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) { | 420 | for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) { |
| 431 | pde_ptr = mmu_probe(va, 2); | 421 | pde_ptr = mmu_probe(va, 2); |
target-sparc/op_helper.c
| @@ -106,9 +106,9 @@ void helper_ld_asi(int asi, int size, int sign) | @@ -106,9 +106,9 @@ void helper_ld_asi(int asi, int size, int sign) | ||
| 106 | case 0x20 ... 0x2f: /* MMU passthrough */ | 106 | case 0x20 ... 0x2f: /* MMU passthrough */ |
| 107 | cpu_physical_memory_read(T0, (void *) &ret, size); | 107 | cpu_physical_memory_read(T0, (void *) &ret, size); |
| 108 | if (size == 4) | 108 | if (size == 4) |
| 109 | - bswap32s(&ret); | ||
| 110 | - else if (size == 2) | ||
| 111 | - bswap16s((uint16_t *)&ret); | 109 | + tswap32s(&ret); |
| 110 | + else if (size == 2) | ||
| 111 | + tswap16s((uint16_t *)&ret); | ||
| 112 | break; | 112 | break; |
| 113 | default: | 113 | default: |
| 114 | ret = 0; | 114 | ret = 0; |
| @@ -170,7 +170,7 @@ void helper_st_asi(int asi, int size, int sign) | @@ -170,7 +170,7 @@ void helper_st_asi(int asi, int size, int sign) | ||
| 170 | int src = T1, dst = T0; | 170 | int src = T1, dst = T0; |
| 171 | uint8_t temp[32]; | 171 | uint8_t temp[32]; |
| 172 | 172 | ||
| 173 | - bswap32s(&src); | 173 | + tswap32s(&src); |
| 174 | 174 | ||
| 175 | cpu_physical_memory_read(src, (void *) &temp, 32); | 175 | cpu_physical_memory_read(src, (void *) &temp, 32); |
| 176 | cpu_physical_memory_write(dst, (void *) &temp, 32); | 176 | cpu_physical_memory_write(dst, (void *) &temp, 32); |
| @@ -185,7 +185,7 @@ void helper_st_asi(int asi, int size, int sign) | @@ -185,7 +185,7 @@ void helper_st_asi(int asi, int size, int sign) | ||
| 185 | uint64_t val; | 185 | uint64_t val; |
| 186 | 186 | ||
| 187 | val = (((uint64_t)T1) << 32) | T2; | 187 | val = (((uint64_t)T1) << 32) | T2; |
| 188 | - bswap64s(&val); | 188 | + tswap64s(&val); |
| 189 | 189 | ||
| 190 | for (i = 0; i < 32; i += 8, dst += 8) { | 190 | for (i = 0; i < 32; i += 8, dst += 8) { |
| 191 | cpu_physical_memory_write(dst, (void *) &val, 8); | 191 | cpu_physical_memory_write(dst, (void *) &val, 8); |
| @@ -196,10 +196,9 @@ void helper_st_asi(int asi, int size, int sign) | @@ -196,10 +196,9 @@ void helper_st_asi(int asi, int size, int sign) | ||
| 196 | { | 196 | { |
| 197 | int temp = T1; | 197 | int temp = T1; |
| 198 | if (size == 4) | 198 | if (size == 4) |
| 199 | - bswap32s(&temp); | 199 | + tswap32s(&temp); |
| 200 | else if (size == 2) | 200 | else if (size == 2) |
| 201 | - bswap16s((uint16_t *)&temp); | ||
| 202 | - | 201 | + tswap16s((uint16_t *)&temp); |
| 203 | cpu_physical_memory_write(T0, (void *) &temp, size); | 202 | cpu_physical_memory_write(T0, (void *) &temp, size); |
| 204 | } | 203 | } |
| 205 | return; | 204 | return; |