Commit 489251fa5437cb43600e49b0f7c5d5c56319cf0e

Authored by aurel32
1 parent 59df7f62

ppc: replace op_set_FT0 with tcg_gen_movi_i64

Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5162 c046a42c-6fe2-441c-8c8c-71466251a162
target-ppc/op.c
... ... @@ -410,16 +410,6 @@ void OPPROTO op_load_fpscr_FT0 (void)
410 410 RETURN();
411 411 }
412 412  
413   -void OPPROTO op_set_FT0 (void)
414   -{
415   - CPU_DoubleU u;
416   -
417   - u.l.upper = 0;
418   - u.l.lower = PARAM1;
419   - FT0 = u.d;
420   - RETURN();
421   -}
422   -
423 413 void OPPROTO op_load_fpscr_T0 (void)
424 414 {
425 415 T0 = (env->fpscr >> PARAM1) & 0xF;
... ...
target-ppc/translate.c
... ... @@ -2094,7 +2094,7 @@ GEN_HANDLER(mtfsfi, 0x3F, 0x06, 0x04, 0x006f0800, PPC_FLOAT)
2094 2094 bf = crbD(ctx->opcode) >> 2;
2095 2095 sh = 7 - bf;
2096 2096 gen_optimize_fprf();
2097   - gen_op_set_FT0(FPIMM(ctx->opcode) << (4 * sh));
  2097 + tcg_gen_movi_i64(cpu_FT[0], FPIMM(ctx->opcode) << (4 * sh));
2098 2098 gen_reset_fpstatus();
2099 2099 gen_op_store_fpscr(1 << sh);
2100 2100 if (unlikely(Rc(ctx->opcode) != 0)) {
... ...