Commit 4870167d04df4f8cc625f75abad49a36f17d70ea

Authored by aurel32
1 parent 18c5f8ea

target-ppc: fix tcg fatal error on i386 host

It looks like the i386 runs out of registers for allocation due
to too many global registers allocated by the ppc target.

Here is a quick and dirty fix that seems to solve the problem.
This should be considered as temporary.

Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5648 c046a42c-6fe2-441c-8c8c-71466251a162
target-ppc/cpu.h
@@ -530,7 +530,11 @@ struct CPUPPCState { @@ -530,7 +530,11 @@ struct CPUPPCState {
530 * during translated code execution 530 * during translated code execution
531 */ 531 */
532 #if TARGET_LONG_BITS > HOST_LONG_BITS 532 #if TARGET_LONG_BITS > HOST_LONG_BITS
533 - target_ulong t0, t1, t2; 533 + target_ulong t0, t1;
  534 +#endif
  535 + /* XXX: this is a temporary workaround for i386. cf translate.c comment */
  536 +#if (TARGET_LONG_BITS > HOST_LONG_BITS) || defined(HOST_I386)
  537 + target_ulong t2;
534 #endif 538 #endif
535 #if !defined(TARGET_PPC64) 539 #if !defined(TARGET_PPC64)
536 /* temporary fixed-point registers 540 /* temporary fixed-point registers
target-ppc/translate.c
@@ -97,8 +97,17 @@ void ppc_translate_init(void) @@ -97,8 +97,17 @@ void ppc_translate_init(void)
97 #else 97 #else
98 cpu_T[0] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG1, "T0"); 98 cpu_T[0] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG1, "T0");
99 cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1"); 99 cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1");
  100 +#ifdef HOST_I386
  101 + /* XXX: This is a temporary workaround for i386.
  102 + * On i386 qemu_st32 runs out of registers.
  103 + * The proper fix is to remove cpu_T.
  104 + */
  105 + cpu_T[2] = tcg_global_mem_new(TCG_TYPE_TL,
  106 + TCG_AREG0, offsetof(CPUState, t2), "T2");
  107 +#else
100 cpu_T[2] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG3, "T2"); 108 cpu_T[2] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG3, "T2");
101 #endif 109 #endif
  110 +#endif
102 #if !defined(TARGET_PPC64) 111 #if !defined(TARGET_PPC64)
103 cpu_T64[0] = tcg_global_mem_new(TCG_TYPE_I64, 112 cpu_T64[0] = tcg_global_mem_new(TCG_TYPE_I64,
104 TCG_AREG0, offsetof(CPUState, t0_64), 113 TCG_AREG0, offsetof(CPUState, t0_64),