gwj / at91sam9263 · Commits

Commit 47ad35f16ae4b6b93cbfa238d51d4edc7dea90b5

Authored by blueswir1
1 parent 5f9981c7

Silence gcc warning about constant overflow 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5175 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 11 additions and 3 deletions
target-sparc/cpu.h
  View file @47ad35f
@@ -142,7 +142,15 @@ @@ -142,7 +142,15 @@
142 #define FSR_FTT2 (1ULL << 16) 142 #define FSR_FTT2 (1ULL << 16)
143 #define FSR_FTT1 (1ULL << 15) 143 #define FSR_FTT1 (1ULL << 15)
144 #define FSR_FTT0 (1ULL << 14) 144 #define FSR_FTT0 (1ULL << 14)
145 -#define FSR_FTT_MASK (FSR_FTT2 | FSR_FTT1 | FSR_FTT0) 145 +//gcc warns about constant overflow for ~FSR_FTT_MASK
  146 +//#define FSR_FTT_MASK (FSR_FTT2 | FSR_FTT1 | FSR_FTT0)
  147 +#ifdef TARGET_SPARC64
  148 +#define FSR_FTT_NMASK 0xfffffffffffe3fffULL
  149 +#define FSR_FTT_CEXC_NMASK 0xfffffffffffe3fe0ULL
  150 +#else
  151 +#define FSR_FTT_NMASK 0xfffe3fffULL
  152 +#define FSR_FTT_CEXC_NMASK 0xfffe3fe0ULL
  153 +#endif
146 #define FSR_FTT_IEEE_EXCP (1ULL << 14) 154 #define FSR_FTT_IEEE_EXCP (1ULL << 14)
147 #define FSR_FTT_UNIMPFPOP (3ULL << 14) 155 #define FSR_FTT_UNIMPFPOP (3ULL << 14)
148 #define FSR_FTT_SEQ_ERROR (4ULL << 14) 156 #define FSR_FTT_SEQ_ERROR (4ULL << 14)
target-sparc/translate.c
  View file @47ad35f
@@ -1602,7 +1602,7 @@ static inline void gen_op_fpexception_im(int fsr_flags) @@ -1602,7 +1602,7 @@ static inline void gen_op_fpexception_im(int fsr_flags)
1602 { 1602 {
1603 TCGv r_const; 1603 TCGv r_const;
1604 1604
1605 - tcg_gen_andi_tl(cpu_fsr, cpu_fsr, ~FSR_FTT_MASK); 1605 + tcg_gen_andi_tl(cpu_fsr, cpu_fsr, FSR_FTT_NMASK);
1606 tcg_gen_ori_tl(cpu_fsr, cpu_fsr, fsr_flags); 1606 tcg_gen_ori_tl(cpu_fsr, cpu_fsr, fsr_flags);
1607 r_const = tcg_const_i32(TT_FP_EXCP); 1607 r_const = tcg_const_i32(TT_FP_EXCP);
1608 tcg_gen_helper_0_1(raise_exception, r_const); 1608 tcg_gen_helper_0_1(raise_exception, r_const);
@@ -1628,7 +1628,7 @@ static int gen_trap_ifnofpu(DisasContext *dc, TCGv r_cond) @@ -1628,7 +1628,7 @@ static int gen_trap_ifnofpu(DisasContext *dc, TCGv r_cond)
1628 1628
1629 static inline void gen_op_clear_ieee_excp_and_FTT(void) 1629 static inline void gen_op_clear_ieee_excp_and_FTT(void)
1630 { 1630 {
1631 - tcg_gen_andi_tl(cpu_fsr, cpu_fsr, ~(FSR_FTT_MASK | FSR_CEXC_MASK)); 1631 + tcg_gen_andi_tl(cpu_fsr, cpu_fsr, FSR_FTT_CEXC_NMASK);
1632 } 1632 }
1633 1633
1634 static inline void gen_clear_float_exceptions(void) 1634 static inline void gen_clear_float_exceptions(void)