gwj / at91sam9263 · Commits

Commit 470d86b736dfafa9619e5dc829ea6eccd4fb5768

Authored by aurel32
1 parent b47543c4

mips_malta: map the CBUS UART as the third serial port 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6367 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 5 additions and 15 deletions
hw/mips_malta.c
  View file @470d86b
@@ -420,11 +420,6 @@ static void malta_fpga_reset(void *opaque) @@ -420,11 +420,6 @@ static void malta_fpga_reset(void *opaque)
420 snprintf(s->display_text, 9, " "); 420 snprintf(s->display_text, 9, " ");
421 } 421 }
422 422
423 -static void malta_fpga_uart_init(CharDriverState *chr)  
424 -{  
425 - qemu_chr_printf(chr, "CBUS UART\r\n");  
426 -}  
427 -  
428 static void malta_fpga_led_init(CharDriverState *chr) 423 static void malta_fpga_led_init(CharDriverState *chr)
429 { 424 {
430 qemu_chr_printf(chr, "\e[HMalta LEDBAR\r\n"); 425 qemu_chr_printf(chr, "\e[HMalta LEDBAR\r\n");
@@ -438,10 +433,9 @@ static void malta_fpga_led_init(CharDriverState *chr) @@ -438,10 +433,9 @@ static void malta_fpga_led_init(CharDriverState *chr)
438 qemu_chr_printf(chr, "+--------+\r\n"); 433 qemu_chr_printf(chr, "+--------+\r\n");
439 } 434 }
440 435
441 -static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env) 436 +static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, qemu_irq uart_irq, CharDriverState *uart_chr)
442 { 437 {
443 MaltaFPGAState *s; 438 MaltaFPGAState *s;
444 - CharDriverState *uart_chr;  
445 int malta; 439 int malta;
446 440
447 s = (MaltaFPGAState *)qemu_mallocz(sizeof(MaltaFPGAState)); 441 s = (MaltaFPGAState *)qemu_mallocz(sizeof(MaltaFPGAState));
@@ -455,9 +449,7 @@ static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env) @@ -455,9 +449,7 @@ static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env)
455 449
456 s->display = qemu_chr_open("fpga", "vc:320x200", malta_fpga_led_init); 450 s->display = qemu_chr_open("fpga", "vc:320x200", malta_fpga_led_init);
457 451
458 - uart_chr = qemu_chr_open("cbus", "vc:80Cx24C", malta_fpga_uart_init);  
459 - s->uart =  
460 - serial_mm_init(base + 0x900, 3, env->irq[2], 230400, uart_chr, 1); 452 + s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr, 1);
461 453
462 malta_fpga_reset(s); 454 malta_fpga_reset(s);
463 qemu_register_reset(malta_fpga_reset, s); 455 qemu_register_reset(malta_fpga_reset, s);
@@ -820,7 +812,7 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size, @@ -820,7 +812,7 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
820 BIOS_SIZE, bios_offset | IO_MEM_ROM); 812 BIOS_SIZE, bios_offset | IO_MEM_ROM);
821 813
822 /* FPGA */ 814 /* FPGA */
823 - malta_fpga = malta_fpga_init(0x1f000000LL, env); 815 + malta_fpga = malta_fpga_init(0x1f000000LL, env->irq[2], serial_hds[2]);
824 816
825 /* Load firmware in flash / BIOS unless we boot directly into a kernel. */ 817 /* Load firmware in flash / BIOS unless we boot directly into a kernel. */
826 if (kernel_filename) { 818 if (kernel_filename) {
@@ -921,10 +913,8 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size, @@ -921,10 +913,8 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
921 /* Super I/O */ 913 /* Super I/O */
922 i8042_init(i8259[1], i8259[12], 0x60); 914 i8042_init(i8259[1], i8259[12], 0x60);
923 rtc_state = rtc_init(0x70, i8259[8]); 915 rtc_state = rtc_init(0x70, i8259[8]);
924 - if (serial_hds[0])  
925 - serial_init(0x3f8, i8259[4], 115200, serial_hds[0]);  
926 - if (serial_hds[1])  
927 - serial_init(0x2f8, i8259[3], 115200, serial_hds[1]); 916 + serial_init(0x3f8, i8259[4], 115200, serial_hds[0]);
  917 + serial_init(0x2f8, i8259[3], 115200, serial_hds[1]);
928 if (parallel_hds[0]) 918 if (parallel_hds[0])
929 parallel_init(0x378, i8259[7], parallel_hds[0]); 919 parallel_init(0x378, i8259[7], parallel_hds[0]);
930 for(i = 0; i < MAX_FD; i++) { 920 for(i = 0; i < MAX_FD; i++) {