Commit 45fd08effd461f85d0480d3b8f85a07751fc55b3
1 parent
7ab064d2
target-i386: Add Core Duo Definition
This patch adds a CPU definition for the Core Duo CPU. I tried to resemble the original as closely as possible and document what features are missing still. This patch enables the use of a recent CPU definition on 32 bit platforms. It also fixes two issues that went along the line: - invalid xlevel in core2duo spec While looking though the CPUIDs again, I found that xlevel is actually 8. - non-PSE36 support The CoreDuo CPUID does not expose the PSE36 capability, but CPUID 0x80000008 is tied to 36 bits. This broke Windows XP installation for me, so I just set it to 32 bits width when PSE36 is not available. The original CPU also exposes 32 bit width in CPUID 0x80000008. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5488 c046a42c-6fe2-441c-8c8c-71466251a162
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target-i386/helper.c
... | ... | @@ -183,7 +183,7 @@ static x86_def_t x86_defs[] = { |
183 | 183 | .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3, |
184 | 184 | .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, |
185 | 185 | /* Missing: .ext3_features = CPUID_EXT3_LAHF_LM */ |
186 | - .xlevel = 0x8000000A, | |
186 | + .xlevel = 0x80000008, | |
187 | 187 | .model_id = "Intel(R) Core(TM)2 Duo CPU T7700 @ 2.40GHz", |
188 | 188 | }, |
189 | 189 | #endif |
... | ... | @@ -199,6 +199,25 @@ static x86_def_t x86_defs[] = { |
199 | 199 | .model_id = "QEMU Virtual CPU version " QEMU_VERSION, |
200 | 200 | }, |
201 | 201 | { |
202 | + .name = "coreduo", | |
203 | + .level = 10, | |
204 | + .family = 6, | |
205 | + .model = 14, | |
206 | + .stepping = 8, | |
207 | + /* The original CPU also implements these features: | |
208 | + CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT, | |
209 | + CPUID_TM, CPUID_PBE */ | |
210 | + .features = PPRO_FEATURES | CPUID_VME | | |
211 | + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA, | |
212 | + /* The original CPU also implements these ext features: | |
213 | + CPUID_EXT_VMX, CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_XTPR, | |
214 | + CPUID_EXT_PDCM */ | |
215 | + .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR, | |
216 | + .ext2_features = CPUID_EXT2_NX, | |
217 | + .xlevel = 0x80000008, | |
218 | + .model_id = "Genuine Intel(R) CPU T2600 @ 2.16GHz", | |
219 | + }, | |
220 | + { | |
202 | 221 | .name = "486", |
203 | 222 | .level = 0, |
204 | 223 | .family = 4, | ... | ... |
target-i386/op_helper.c
... | ... | @@ -2026,7 +2026,10 @@ void helper_cpuid(void) |
2026 | 2026 | #if defined(USE_KQEMU) |
2027 | 2027 | EAX = 0x00000020; /* 32 bits physical */ |
2028 | 2028 | #else |
2029 | - EAX = 0x00000024; /* 36 bits physical */ | |
2029 | + if (env->cpuid_features & CPUID_PSE36) | |
2030 | + EAX = 0x00000024; /* 36 bits physical */ | |
2031 | + else | |
2032 | + EAX = 0x00000020; /* 32 bits physical */ | |
2030 | 2033 | #endif |
2031 | 2034 | } |
2032 | 2035 | EBX = 0; | ... | ... |