Commit 44cbbf18b946030d7445a324aa42f624031b0639
1 parent
6070dd07
Fix malta emulation for 64bit qemu.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2355 c046a42c-6fe2-441c-8c8c-71466251a162
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2 changed files
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20 additions
and
13 deletions
hw/mips_malta.c
| @@ -24,16 +24,21 @@ | @@ -24,16 +24,21 @@ | ||
| 24 | 24 | ||
| 25 | #include "vl.h" | 25 | #include "vl.h" |
| 26 | 26 | ||
| 27 | -#define BIOS_FILENAME "mips_bios.bin" | 27 | +#ifdef TARGET_WORDS_BIGENDIAN |
| 28 | +#define BIOS_FILENAME "mips_bios.bin" | ||
| 29 | +#else | ||
| 30 | +#define BIOS_FILENAME "mipsel_bios.bin" | ||
| 31 | +#endif | ||
| 32 | + | ||
| 28 | #ifdef MIPS_HAS_MIPS64 | 33 | #ifdef MIPS_HAS_MIPS64 |
| 29 | -#define INITRD_LOAD_ADDR (uint64_t)0x80800000 | ||
| 30 | -#define ENVP_ADDR (uint64_t)0x80002000 | 34 | +#define INITRD_LOAD_ADDR (int64_t)0x80800000 |
| 35 | +#define ENVP_ADDR (int64_t)0x80002000 | ||
| 31 | #else | 36 | #else |
| 32 | -#define INITRD_LOAD_ADDR (uint32_t)0x80800000 | ||
| 33 | -#define ENVP_ADDR (uint32_t)0x80002000 | 37 | +#define INITRD_LOAD_ADDR (int32_t)0x80800000 |
| 38 | +#define ENVP_ADDR (int32_t)0x80002000 | ||
| 34 | #endif | 39 | #endif |
| 35 | 40 | ||
| 36 | -#define VIRT_TO_PHYS_ADDEND (-((uint64_t)(uint32_t)0x80000000)) | 41 | +#define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000)) |
| 37 | 42 | ||
| 38 | #define ENVP_NB_ENTRIES 16 | 43 | #define ENVP_NB_ENTRIES 16 |
| 39 | #define ENVP_ENTRY_SIZE 256 | 44 | #define ENVP_ENTRY_SIZE 256 |
| @@ -156,7 +161,8 @@ static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr) | @@ -156,7 +161,8 @@ static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr) | ||
| 156 | 161 | ||
| 157 | default: | 162 | default: |
| 158 | #if 0 | 163 | #if 0 |
| 159 | - printf ("malta_fpga_read: Bad register offset 0x%x\n", (int)addr); | 164 | + printf ("malta_fpga_read: Bad register offset 0x" TLSZ "\n", |
| 165 | + addr); | ||
| 160 | #endif | 166 | #endif |
| 161 | break; | 167 | break; |
| 162 | } | 168 | } |
| @@ -239,7 +245,8 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr, | @@ -239,7 +245,8 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr, | ||
| 239 | 245 | ||
| 240 | default: | 246 | default: |
| 241 | #if 0 | 247 | #if 0 |
| 242 | - printf ("malta_fpga_write: Bad register offset 0x%x\n", (int)addr); | 248 | + printf ("malta_fpga_write: Bad register offset 0x" TLSZ "\n", |
| 249 | + addr); | ||
| 243 | #endif | 250 | #endif |
| 244 | break; | 251 | break; |
| 245 | } | 252 | } |
| @@ -458,7 +465,7 @@ static int64_t load_kernel (CPUState *env) | @@ -458,7 +465,7 @@ static int64_t load_kernel (CPUState *env) | ||
| 458 | /* Store command line. */ | 465 | /* Store command line. */ |
| 459 | prom_set(index++, env->kernel_filename); | 466 | prom_set(index++, env->kernel_filename); |
| 460 | if (initrd_size > 0) | 467 | if (initrd_size > 0) |
| 461 | - prom_set(index++, "rd_start=0x%08x rd_size=%li %s", INITRD_LOAD_ADDR, initrd_size, env->kernel_cmdline); | 468 | + prom_set(index++, "rd_start=0x" TLSZ " rd_size=%li %s", INITRD_LOAD_ADDR, initrd_size, env->kernel_cmdline); |
| 462 | else | 469 | else |
| 463 | prom_set(index++, env->kernel_cmdline); | 470 | prom_set(index++, env->kernel_cmdline); |
| 464 | 471 |
hw/mips_r4k.c
| @@ -14,7 +14,7 @@ | @@ -14,7 +14,7 @@ | ||
| 14 | #else | 14 | #else |
| 15 | #define BIOS_FILENAME "mipsel_bios.bin" | 15 | #define BIOS_FILENAME "mipsel_bios.bin" |
| 16 | #endif | 16 | #endif |
| 17 | -//#define BIOS_FILENAME "system.bin" | 17 | + |
| 18 | #ifdef MIPS_HAS_MIPS64 | 18 | #ifdef MIPS_HAS_MIPS64 |
| 19 | #define INITRD_LOAD_ADDR (int64_t)(int32_t)0x80800000 | 19 | #define INITRD_LOAD_ADDR (int64_t)(int32_t)0x80800000 |
| 20 | #else | 20 | #else |
| @@ -112,8 +112,8 @@ void load_kernel (CPUState *env, int ram_size, const char *kernel_filename, | @@ -112,8 +112,8 @@ void load_kernel (CPUState *env, int ram_size, const char *kernel_filename, | ||
| 112 | strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline); | 112 | strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline); |
| 113 | } | 113 | } |
| 114 | 114 | ||
| 115 | - *(int *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678); | ||
| 116 | - *(int *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size); | 115 | + *(int32_t *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678); |
| 116 | + *(int32_t *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size); | ||
| 117 | } | 117 | } |
| 118 | 118 | ||
| 119 | static void main_cpu_reset(void *opaque) | 119 | static void main_cpu_reset(void *opaque) |
| @@ -159,7 +159,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, | @@ -159,7 +159,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, | ||
| 159 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); | 159 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); |
| 160 | bios_size = load_image(buf, phys_ram_base + bios_offset); | 160 | bios_size = load_image(buf, phys_ram_base + bios_offset); |
| 161 | if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { | 161 | if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { |
| 162 | - cpu_register_physical_memory((uint32_t)(0x1fc00000), | 162 | + cpu_register_physical_memory(0x1fc00000, |
| 163 | BIOS_SIZE, bios_offset | IO_MEM_ROM); | 163 | BIOS_SIZE, bios_offset | IO_MEM_ROM); |
| 164 | } else { | 164 | } else { |
| 165 | /* not fatal */ | 165 | /* not fatal */ |