Commit 42fc73a1ceeadb27d15873124c537be5ada4b4d3

Authored by aurel32
1 parent e2fc836b

Support epoch of 1980 in RTC emulation for MIPS Magnum

On the MIPS Magnum, the time that is held in the RTC's NVRAM should be
relative to midnight on 1980-01-01.  This patch adds an extra parameter
to rtc_init(), allowing different epochs to be used.  For the Magnum,
1980 is specified, and for all other machines, 2000 is specified.

I've not modified the handling of the century byte, as with an epoch of
1980 and a year of 2009, one could argue that it should hold either
0, 1, 19 or 20.  NT 3.50 on MIPS does not read the century byte.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6429 c046a42c-6fe2-441c-8c8c-71466251a162
hw/mc146818rtc.c
@@ -60,6 +60,7 @@ struct RTCState { @@ -60,6 +60,7 @@ struct RTCState {
60 uint8_t cmos_data[128]; 60 uint8_t cmos_data[128];
61 uint8_t cmos_index; 61 uint8_t cmos_index;
62 struct tm current_tm; 62 struct tm current_tm;
  63 + int base_year;
63 qemu_irq irq; 64 qemu_irq irq;
64 int it_shift; 65 int it_shift;
65 /* periodic timer */ 66 /* periodic timer */
@@ -235,12 +236,13 @@ static void rtc_set_time(RTCState *s) @@ -235,12 +236,13 @@ static void rtc_set_time(RTCState *s)
235 tm->tm_wday = from_bcd(s, s->cmos_data[RTC_DAY_OF_WEEK]) - 1; 236 tm->tm_wday = from_bcd(s, s->cmos_data[RTC_DAY_OF_WEEK]) - 1;
236 tm->tm_mday = from_bcd(s, s->cmos_data[RTC_DAY_OF_MONTH]); 237 tm->tm_mday = from_bcd(s, s->cmos_data[RTC_DAY_OF_MONTH]);
237 tm->tm_mon = from_bcd(s, s->cmos_data[RTC_MONTH]) - 1; 238 tm->tm_mon = from_bcd(s, s->cmos_data[RTC_MONTH]) - 1;
238 - tm->tm_year = from_bcd(s, s->cmos_data[RTC_YEAR]) + 100; 239 + tm->tm_year = from_bcd(s, s->cmos_data[RTC_YEAR]) + s->base_year - 1900;
239 } 240 }
240 241
241 static void rtc_copy_date(RTCState *s) 242 static void rtc_copy_date(RTCState *s)
242 { 243 {
243 const struct tm *tm = &s->current_tm; 244 const struct tm *tm = &s->current_tm;
  245 + int year;
244 246
245 s->cmos_data[RTC_SECONDS] = to_bcd(s, tm->tm_sec); 247 s->cmos_data[RTC_SECONDS] = to_bcd(s, tm->tm_sec);
246 s->cmos_data[RTC_MINUTES] = to_bcd(s, tm->tm_min); 248 s->cmos_data[RTC_MINUTES] = to_bcd(s, tm->tm_min);
@@ -256,7 +258,10 @@ static void rtc_copy_date(RTCState *s) @@ -256,7 +258,10 @@ static void rtc_copy_date(RTCState *s)
256 s->cmos_data[RTC_DAY_OF_WEEK] = to_bcd(s, tm->tm_wday + 1); 258 s->cmos_data[RTC_DAY_OF_WEEK] = to_bcd(s, tm->tm_wday + 1);
257 s->cmos_data[RTC_DAY_OF_MONTH] = to_bcd(s, tm->tm_mday); 259 s->cmos_data[RTC_DAY_OF_MONTH] = to_bcd(s, tm->tm_mday);
258 s->cmos_data[RTC_MONTH] = to_bcd(s, tm->tm_mon + 1); 260 s->cmos_data[RTC_MONTH] = to_bcd(s, tm->tm_mon + 1);
259 - s->cmos_data[RTC_YEAR] = to_bcd(s, tm->tm_year % 100); 261 + year = (tm->tm_year - s->base_year) % 100;
  262 + if (year < 0)
  263 + year += 100;
  264 + s->cmos_data[RTC_YEAR] = to_bcd(s, year);
260 } 265 }
261 266
262 /* month is between 0 and 11. */ 267 /* month is between 0 and 11. */
@@ -522,7 +527,7 @@ static int rtc_load_td(QEMUFile *f, void *opaque, int version_id) @@ -522,7 +527,7 @@ static int rtc_load_td(QEMUFile *f, void *opaque, int version_id)
522 } 527 }
523 #endif 528 #endif
524 529
525 -RTCState *rtc_init(int base, qemu_irq irq) 530 +RTCState *rtc_init(int base, qemu_irq irq, int base_year)
526 { 531 {
527 RTCState *s; 532 RTCState *s;
528 533
@@ -536,6 +541,7 @@ RTCState *rtc_init(int base, qemu_irq irq) @@ -536,6 +541,7 @@ RTCState *rtc_init(int base, qemu_irq irq)
536 s->cmos_data[RTC_REG_C] = 0x00; 541 s->cmos_data[RTC_REG_C] = 0x00;
537 s->cmos_data[RTC_REG_D] = 0x80; 542 s->cmos_data[RTC_REG_D] = 0x80;
538 543
  544 + s->base_year = base_year;
539 rtc_set_date_from_host(s); 545 rtc_set_date_from_host(s);
540 546
541 s->periodic_timer = qemu_new_timer(vm_clock, 547 s->periodic_timer = qemu_new_timer(vm_clock,
@@ -631,7 +637,8 @@ static CPUWriteMemoryFunc *rtc_mm_write[] = { @@ -631,7 +637,8 @@ static CPUWriteMemoryFunc *rtc_mm_write[] = {
631 &cmos_mm_writel, 637 &cmos_mm_writel,
632 }; 638 };
633 639
634 -RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq) 640 +RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
  641 + int base_year)
635 { 642 {
636 RTCState *s; 643 RTCState *s;
637 int io_memory; 644 int io_memory;
@@ -646,6 +653,7 @@ RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq) @@ -646,6 +653,7 @@ RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq)
646 s->cmos_data[RTC_REG_C] = 0x00; 653 s->cmos_data[RTC_REG_C] = 0x00;
647 s->cmos_data[RTC_REG_D] = 0x80; 654 s->cmos_data[RTC_REG_D] = 0x80;
648 655
  656 + s->base_year = base_year;
649 rtc_set_date_from_host(s); 657 rtc_set_date_from_host(s);
650 658
651 s->periodic_timer = qemu_new_timer(vm_clock, 659 s->periodic_timer = qemu_new_timer(vm_clock,
hw/mips_jazz.c
@@ -241,7 +241,7 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size, @@ -241,7 +241,7 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size,
241 fdctrl_init(rc4030[1], 0, 1, 0x80003000, fds); 241 fdctrl_init(rc4030[1], 0, 1, 0x80003000, fds);
242 242
243 /* Real time clock */ 243 /* Real time clock */
244 - rtc_init(0x70, i8259[8]); 244 + rtc_init(0x70, i8259[8], 1980);
245 s_rtc = cpu_register_io_memory(0, rtc_read, rtc_write, env); 245 s_rtc = cpu_register_io_memory(0, rtc_read, rtc_write, env);
246 cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc); 246 cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc);
247 247
hw/mips_malta.c
@@ -918,7 +918,7 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size, @@ -918,7 +918,7 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size,
918 918
919 /* Super I/O */ 919 /* Super I/O */
920 i8042_init(i8259[1], i8259[12], 0x60); 920 i8042_init(i8259[1], i8259[12], 0x60);
921 - rtc_state = rtc_init(0x70, i8259[8]); 921 + rtc_state = rtc_init(0x70, i8259[8], 2000);
922 serial_init(0x3f8, i8259[4], 115200, serial_hds[0]); 922 serial_init(0x3f8, i8259[4], 115200, serial_hds[0]);
923 serial_init(0x2f8, i8259[3], 115200, serial_hds[1]); 923 serial_init(0x2f8, i8259[3], 115200, serial_hds[1]);
924 if (parallel_hds[0]) 924 if (parallel_hds[0])
hw/mips_r4k.c
@@ -235,7 +235,7 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size, @@ -235,7 +235,7 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
235 /* The PIC is attached to the MIPS CPU INT0 pin */ 235 /* The PIC is attached to the MIPS CPU INT0 pin */
236 i8259 = i8259_init(env->irq[2]); 236 i8259 = i8259_init(env->irq[2]);
237 237
238 - rtc_state = rtc_init(0x70, i8259[8]); 238 + rtc_state = rtc_init(0x70, i8259[8], 2000);
239 239
240 /* Register 64 KB of ISA IO space at 0x14000000 */ 240 /* Register 64 KB of ISA IO space at 0x14000000 */
241 isa_mmio_init(0x14000000, 0x00010000); 241 isa_mmio_init(0x14000000, 0x00010000);
@@ -968,7 +968,7 @@ vga_bios_error: @@ -968,7 +968,7 @@ vga_bios_error:
968 } 968 }
969 } 969 }
970 970
971 - rtc_state = rtc_init(0x70, i8259[8]); 971 + rtc_state = rtc_init(0x70, i8259[8], 2000);
972 972
973 qemu_register_boot_set(pc_boot_set, rtc_state); 973 qemu_register_boot_set(pc_boot_set, rtc_state);
974 974
@@ -83,8 +83,9 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, @@ -83,8 +83,9 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
83 83
84 typedef struct RTCState RTCState; 84 typedef struct RTCState RTCState;
85 85
86 -RTCState *rtc_init(int base, qemu_irq irq);  
87 -RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq); 86 +RTCState *rtc_init(int base, qemu_irq irq, int base_year);
  87 +RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
  88 + int base_year);
88 void rtc_set_memory(RTCState *s, int addr, int val); 89 void rtc_set_memory(RTCState *s, int addr, int val);
89 void rtc_set_date(RTCState *s, const struct tm *tm); 90 void rtc_set_date(RTCState *s, const struct tm *tm);
90 void cmos_set_s3_resume(void); 91 void cmos_set_s3_resume(void);
hw/ppc_prep.c
@@ -659,7 +659,7 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size, @@ -659,7 +659,7 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size,
659 vga_ram_size, 0, 0); 659 vga_ram_size, 0, 0);
660 // openpic = openpic_init(0x00000000, 0xF0000000, 1); 660 // openpic = openpic_init(0x00000000, 0xF0000000, 1);
661 // pit = pit_init(0x40, i8259[0]); 661 // pit = pit_init(0x40, i8259[0]);
662 - rtc_init(0x70, i8259[8]); 662 + rtc_init(0x70, i8259[8], 2000);
663 663
664 serial_init(0x3f8, i8259[4], 115200, serial_hds[0]); 664 serial_init(0x3f8, i8259[4], 115200, serial_hds[0]);
665 nb_nics1 = nb_nics; 665 nb_nics1 = nb_nics;