Commit 4296f45902536506369cc9c9c329d6680fa3f1a9
1 parent
c068688b
Make CPU hflags be a masked version of the PowerPC MSR.
As a side effect, avoid potential bits shadowing in TB flags on 64 bits BookE. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3199 c046a42c-6fe2-441c-8c8c-71466251a162
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5 additions
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4 deletions
target-ppc/cpu.h
| ... | ... | @@ -807,7 +807,7 @@ struct CPUPPCState { |
| 807 | 807 | /* Those resources are used only in Qemu core */ |
| 808 | 808 | jmp_buf jmp_env; |
| 809 | 809 | int user_mode_only; /* user mode only simulation */ |
| 810 | - uint32_t hflags; | |
| 810 | + target_ulong hflags; /* hflags is a MSR & HFLAGS_MASK */ | |
| 811 | 811 | |
| 812 | 812 | /* Power management */ |
| 813 | 813 | int power_mode; | ... | ... |
target-ppc/helper.c
| ... | ... | @@ -1776,13 +1776,14 @@ void ppc_store_msr_32 (CPUPPCState *env, uint32_t value) |
| 1776 | 1776 | void do_compute_hflags (CPUPPCState *env) |
| 1777 | 1777 | { |
| 1778 | 1778 | /* Compute current hflags */ |
| 1779 | - env->hflags = (msr_cm << MSR_CM) | (msr_vr << MSR_VR) | | |
| 1779 | + env->hflags = (msr_vr << MSR_VR) | | |
| 1780 | 1780 | (msr_ap << MSR_AP) | (msr_sa << MSR_SA) | (msr_pr << MSR_PR) | |
| 1781 | 1781 | (msr_fp << MSR_FP) | (msr_fe0 << MSR_FE0) | (msr_se << MSR_SE) | |
| 1782 | 1782 | (msr_be << MSR_BE) | (msr_fe1 << MSR_FE1) | (msr_le << MSR_LE); |
| 1783 | 1783 | #if defined (TARGET_PPC64) |
| 1784 | - /* No care here: PowerPC 64 MSR_SF means the same as MSR_CM for BookE */ | |
| 1785 | - env->hflags |= (msr_sf << (MSR_SF - 32)) | (msr_hv << (MSR_HV - 32)); | |
| 1784 | + env->hflags |= msr_cm << MSR_CM; | |
| 1785 | + env->hflags |= (uint64_t)msr_sf << MSR_SF; | |
| 1786 | + env->hflags |= (uint64_t)msr_hv << MSR_HV; | |
| 1786 | 1787 | #endif |
| 1787 | 1788 | } |
| 1788 | 1789 | ... | ... |