Commit 41e0c701599de298beec6853f9bb055365e51174

Authored by aurel32
1 parent 36556b20

target-mips: implement FPU Flush-To-Zero mode

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6914 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 5 additions and 0 deletions
target-mips/op_helper.c
... ... @@ -1879,6 +1879,9 @@ unsigned int ieee_rm[] = {
1879 1879 #define RESTORE_ROUNDING_MODE \
1880 1880 set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
1881 1881  
  1882 +#define RESTORE_FLUSH_MODE \
  1883 + set_flush_to_zero((env->active_fpu.fcr31 & (1 << 24)) != 0, &env->active_fpu.fp_status);
  1884 +
1882 1885 target_ulong helper_cfc1 (uint32_t reg)
1883 1886 {
1884 1887 target_ulong t0;
... ... @@ -1934,6 +1937,8 @@ void helper_ctc1 (target_ulong t0, uint32_t reg)
1934 1937 }
1935 1938 /* set rounding mode */
1936 1939 RESTORE_ROUNDING_MODE;
  1940 + /* set flush-to-zero mode */
  1941 + RESTORE_FLUSH_MODE;
1937 1942 set_float_exception_flags(0, &env->active_fpu.fp_status);
1938 1943 if ((GET_FP_ENABLE(env->active_fpu.fcr31) | 0x20) & GET_FP_CAUSE(env->active_fpu.fcr31))
1939 1944 helper_raise_exception(EXCP_FPE);
... ...