Commit 415e561f1de19e9fa609a58bec67c9b59fcdf726
1 parent
ee8b7021
cleanup
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@599 c046a42c-6fe2-441c-8c8c-71466251a162
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2 changed files
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5 additions
and
29 deletions
linux-user/main.c
... | ... | @@ -903,6 +903,9 @@ int main(int argc, char **argv) |
903 | 903 | env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; |
904 | 904 | env->hflags |= HF_PE_MASK; |
905 | 905 | |
906 | + /* flags setup : we activate the IRQs by default as in user mode */ | |
907 | + env->eflags |= IF_MASK; | |
908 | + | |
906 | 909 | /* linux register setup */ |
907 | 910 | env->regs[R_EAX] = regs->eax; |
908 | 911 | env->regs[R_EBX] = regs->ebx; | ... | ... |
vl.c
... | ... | @@ -2527,7 +2527,7 @@ void kbd_write_command(CPUState *env, uint32_t addr, uint32_t val) |
2527 | 2527 | case KBD_CCMD_READ_OUTPORT: |
2528 | 2528 | /* XXX: check that */ |
2529 | 2529 | #ifdef TARGET_I386 |
2530 | - val = 0x01 | (a20_enabled << 1); | |
2530 | + val = 0x01 | (((cpu_single_env->a20_mask >> 20) & 1) << 1); | |
2531 | 2531 | #else |
2532 | 2532 | val = 0x01; |
2533 | 2533 | #endif |
... | ... | @@ -3591,9 +3591,7 @@ int main(int argc, char **argv) |
3591 | 3591 | params->orig_video_cols = 80; |
3592 | 3592 | |
3593 | 3593 | /* setup basic memory access */ |
3594 | - env->cr[0] = 0x00000033; | |
3595 | - env->hflags |= HF_PE_MASK; | |
3596 | - cpu_x86_init_mmu(env); | |
3594 | + cpu_x86_update_cr0(env, 0x00000033); | |
3597 | 3595 | |
3598 | 3596 | memset(params->idt_table, 0, sizeof(params->idt_table)); |
3599 | 3597 | |
... | ... | @@ -3619,7 +3617,6 @@ int main(int argc, char **argv) |
3619 | 3617 | env->regs[R_ESI] = KERNEL_PARAMS_ADDR; |
3620 | 3618 | env->eflags = 0x2; |
3621 | 3619 | #elif defined (TARGET_PPC) |
3622 | - cpu_x86_init_mmu(env); | |
3623 | 3620 | PPC_init_hw(env, phys_ram_size, KERNEL_LOAD_ADDR, ret, |
3624 | 3621 | KERNEL_STACK_ADDR, boot_device); |
3625 | 3622 | #endif |
... | ... | @@ -3641,35 +3638,11 @@ int main(int argc, char **argv) |
3641 | 3638 | ret = load_image(buf, phys_ram_base + 0x000c0000); |
3642 | 3639 | |
3643 | 3640 | /* setup basic memory access */ |
3644 | - env->cr[0] = 0x60000010; | |
3645 | - cpu_x86_init_mmu(env); | |
3646 | - | |
3647 | 3641 | cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 | IO_MEM_ROM); |
3648 | 3642 | cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 | IO_MEM_ROM); |
3649 | 3643 | |
3650 | - env->idt.limit = 0xffff; | |
3651 | - env->gdt.limit = 0xffff; | |
3652 | - env->ldt.limit = 0xffff; | |
3653 | - env->ldt.flags = DESC_P_MASK; | |
3654 | - env->tr.limit = 0xffff; | |
3655 | - env->tr.flags = DESC_P_MASK; | |
3656 | - | |
3657 | - /* not correct (CS base=0xffff0000) */ | |
3658 | - cpu_x86_load_seg_cache(env, R_CS, 0xf000, (uint8_t *)0x000f0000, 0xffff, 0); | |
3659 | - cpu_x86_load_seg_cache(env, R_DS, 0, NULL, 0xffff, 0); | |
3660 | - cpu_x86_load_seg_cache(env, R_ES, 0, NULL, 0xffff, 0); | |
3661 | - cpu_x86_load_seg_cache(env, R_SS, 0, NULL, 0xffff, 0); | |
3662 | - cpu_x86_load_seg_cache(env, R_FS, 0, NULL, 0xffff, 0); | |
3663 | - cpu_x86_load_seg_cache(env, R_GS, 0, NULL, 0xffff, 0); | |
3664 | - | |
3665 | - env->eip = 0xfff0; | |
3666 | - env->regs[R_EDX] = 0x600; /* indicate P6 processor */ | |
3667 | - | |
3668 | - env->eflags = 0x2; | |
3669 | - | |
3670 | 3644 | bochs_bios_init(); |
3671 | 3645 | #elif defined(TARGET_PPC) |
3672 | - cpu_x86_init_mmu(env); | |
3673 | 3646 | /* allocate ROM */ |
3674 | 3647 | // snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); |
3675 | 3648 | snprintf(buf, sizeof(buf), "%s", BIOS_FILENAME); | ... | ... |