Commit 40ce0a9a8f498dc4c766f55760eea49b3f55069e
1 parent
9437454a
CPU boot mode
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3231 c046a42c-6fe2-441c-8c8c-71466251a162
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6 changed files
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21 additions
and
10 deletions
cpu-exec.c
| @@ -181,8 +181,9 @@ static inline TranslationBlock *tb_find_fast(void) | @@ -181,8 +181,9 @@ static inline TranslationBlock *tb_find_fast(void) | ||
| 181 | flags = (((env->pstate & PS_PEF) >> 1) | ((env->fprs & FPRS_FEF) << 2)) | 181 | flags = (((env->pstate & PS_PEF) >> 1) | ((env->fprs & FPRS_FEF) << 2)) |
| 182 | | (env->pstate & PS_PRIV) | ((env->lsu & (DMMU_E | IMMU_E)) >> 2); | 182 | | (env->pstate & PS_PRIV) | ((env->lsu & (DMMU_E | IMMU_E)) >> 2); |
| 183 | #else | 183 | #else |
| 184 | - // FPU enable . MMU enabled . MMU no-fault . Supervisor | ||
| 185 | - flags = (env->psref << 3) | ((env->mmuregs[0] & (MMU_E | MMU_NF)) << 1) | 184 | + // FPU enable . MMU Boot . MMU enabled . MMU no-fault . Supervisor |
| 185 | + flags = (env->psref << 4) | (((env->mmuregs[0] & MMU_BM) >> 14) << 3) | ||
| 186 | + | ((env->mmuregs[0] & (MMU_E | MMU_NF)) << 1) | ||
| 186 | | env->psrs; | 187 | | env->psrs; |
| 187 | #endif | 188 | #endif |
| 188 | cs_base = env->npc; | 189 | cs_base = env->npc; |
hw/sun4m.c
| @@ -50,7 +50,8 @@ | @@ -50,7 +50,8 @@ | ||
| 50 | #define CMDLINE_ADDR 0x007ff000 | 50 | #define CMDLINE_ADDR 0x007ff000 |
| 51 | #define INITRD_LOAD_ADDR 0x00800000 | 51 | #define INITRD_LOAD_ADDR 0x00800000 |
| 52 | #define PROM_SIZE_MAX (256 * 1024) | 52 | #define PROM_SIZE_MAX (256 * 1024) |
| 53 | -#define PROM_ADDR 0xffd00000 | 53 | +#define PROM_PADDR 0xff0000000ULL |
| 54 | +#define PROM_VADDR 0xffd00000 | ||
| 54 | #define PROM_FILENAME "openbios-sparc32" | 55 | #define PROM_FILENAME "openbios-sparc32" |
| 55 | 56 | ||
| 56 | #define MAX_CPUS 16 | 57 | #define MAX_CPUS 16 |
| @@ -425,12 +426,12 @@ static void sun4m_load_kernel(long vram_size, int RAM_size, int boot_device, | @@ -425,12 +426,12 @@ static void sun4m_load_kernel(long vram_size, int RAM_size, int boot_device, | ||
| 425 | linux_boot = (kernel_filename != NULL); | 426 | linux_boot = (kernel_filename != NULL); |
| 426 | 427 | ||
| 427 | prom_offset = RAM_size + vram_size; | 428 | prom_offset = RAM_size + vram_size; |
| 428 | - cpu_register_physical_memory(PROM_ADDR, | 429 | + cpu_register_physical_memory(PROM_PADDR, |
| 429 | (PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK, | 430 | (PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK, |
| 430 | prom_offset | IO_MEM_ROM); | 431 | prom_offset | IO_MEM_ROM); |
| 431 | 432 | ||
| 432 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, PROM_FILENAME); | 433 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, PROM_FILENAME); |
| 433 | - ret = load_elf(buf, 0, NULL, NULL, NULL); | 434 | + ret = load_elf(buf, PROM_PADDR - PROM_VADDR, NULL, NULL, NULL); |
| 434 | if (ret < 0) { | 435 | if (ret < 0) { |
| 435 | fprintf(stderr, "qemu: could not load prom '%s'\n", | 436 | fprintf(stderr, "qemu: could not load prom '%s'\n", |
| 436 | buf); | 437 | buf); |
| @@ -588,7 +589,7 @@ static void ss10_init(int RAM_size, int vga_ram_size, int boot_device, | @@ -588,7 +589,7 @@ static void ss10_init(int RAM_size, int vga_ram_size, int boot_device, | ||
| 588 | cpu_model = "TI SuperSparc II"; | 589 | cpu_model = "TI SuperSparc II"; |
| 589 | sun4m_common_init(RAM_size, boot_device, ds, kernel_filename, | 590 | sun4m_common_init(RAM_size, boot_device, ds, kernel_filename, |
| 590 | kernel_cmdline, initrd_filename, cpu_model, | 591 | kernel_cmdline, initrd_filename, cpu_model, |
| 591 | - 1, PROM_ADDR); // XXX prom overlap, actually first 4GB ok | 592 | + 1, 0xffffffff); // XXX actually first 62GB ok |
| 592 | } | 593 | } |
| 593 | 594 | ||
| 594 | QEMUMachine ss5_machine = { | 595 | QEMUMachine ss5_machine = { |
target-sparc/cpu.h
| @@ -145,6 +145,7 @@ | @@ -145,6 +145,7 @@ | ||
| 145 | /* MMU */ | 145 | /* MMU */ |
| 146 | #define MMU_E (1<<0) | 146 | #define MMU_E (1<<0) |
| 147 | #define MMU_NF (1<<1) | 147 | #define MMU_NF (1<<1) |
| 148 | +#define MMU_BM (1<<14) | ||
| 148 | 149 | ||
| 149 | #define PTE_ENTRYTYPE_MASK 3 | 150 | #define PTE_ENTRYTYPE_MASK 3 |
| 150 | #define PTE_ACCESS_MASK 0x1c | 151 | #define PTE_ACCESS_MASK 0x1c |
target-sparc/helper.c
| @@ -110,7 +110,14 @@ int get_physical_address (CPUState *env, target_phys_addr_t *physical, int *prot | @@ -110,7 +110,14 @@ int get_physical_address (CPUState *env, target_phys_addr_t *physical, int *prot | ||
| 110 | unsigned long page_offset; | 110 | unsigned long page_offset; |
| 111 | 111 | ||
| 112 | virt_addr = address & TARGET_PAGE_MASK; | 112 | virt_addr = address & TARGET_PAGE_MASK; |
| 113 | + | ||
| 113 | if ((env->mmuregs[0] & MMU_E) == 0) { /* MMU disabled */ | 114 | if ((env->mmuregs[0] & MMU_E) == 0) { /* MMU disabled */ |
| 115 | + // Boot mode: instruction fetches are taken from PROM | ||
| 116 | + if (rw == 2 && (env->mmuregs[0] & MMU_BM)) { | ||
| 117 | + *physical = 0xff0000000ULL | (address & 0x3ffffULL); | ||
| 118 | + *prot = PAGE_READ | PAGE_EXEC; | ||
| 119 | + return 0; | ||
| 120 | + } | ||
| 114 | *physical = address; | 121 | *physical = address; |
| 115 | *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; | 122 | *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; |
| 116 | return 0; | 123 | return 0; |
target-sparc/op_helper.c
| @@ -337,8 +337,8 @@ void helper_st_asi(int asi, int size) | @@ -337,8 +337,8 @@ void helper_st_asi(int asi, int size) | ||
| 337 | oldreg = env->mmuregs[reg]; | 337 | oldreg = env->mmuregs[reg]; |
| 338 | switch(reg) { | 338 | switch(reg) { |
| 339 | case 0: | 339 | case 0: |
| 340 | - env->mmuregs[reg] &= ~(MMU_E | MMU_NF); | ||
| 341 | - env->mmuregs[reg] |= T1 & (MMU_E | MMU_NF); | 340 | + env->mmuregs[reg] &= ~(MMU_E | MMU_NF | MMU_BM); |
| 341 | + env->mmuregs[reg] |= T1 & (MMU_E | MMU_NF | MMU_BM); | ||
| 342 | // Mappings generated during no-fault mode or MMU | 342 | // Mappings generated during no-fault mode or MMU |
| 343 | // disabled mode are invalid in normal mode | 343 | // disabled mode are invalid in normal mode |
| 344 | if (oldreg != env->mmuregs[reg]) | 344 | if (oldreg != env->mmuregs[reg]) |
target-sparc/translate.c
| @@ -3486,8 +3486,9 @@ void cpu_reset(CPUSPARCState *env) | @@ -3486,8 +3486,9 @@ void cpu_reset(CPUSPARCState *env) | ||
| 3486 | env->pstate = PS_PRIV; | 3486 | env->pstate = PS_PRIV; |
| 3487 | env->pc = 0x1fff0000000ULL; | 3487 | env->pc = 0x1fff0000000ULL; |
| 3488 | #else | 3488 | #else |
| 3489 | - env->pc = 0xffd00000; | 3489 | + env->pc = 0; |
| 3490 | env->mmuregs[0] &= ~(MMU_E | MMU_NF); | 3490 | env->mmuregs[0] &= ~(MMU_E | MMU_NF); |
| 3491 | + env->mmuregs[0] |= MMU_BM; | ||
| 3491 | #endif | 3492 | #endif |
| 3492 | env->npc = env->pc + 4; | 3493 | env->npc = env->pc + 4; |
| 3493 | #endif | 3494 | #endif |
| @@ -3584,7 +3585,7 @@ int cpu_sparc_register (CPUSPARCState *env, const sparc_def_t *def) | @@ -3584,7 +3585,7 @@ int cpu_sparc_register (CPUSPARCState *env, const sparc_def_t *def) | ||
| 3584 | env->version = def->iu_version; | 3585 | env->version = def->iu_version; |
| 3585 | env->fsr = def->fpu_version; | 3586 | env->fsr = def->fpu_version; |
| 3586 | #if !defined(TARGET_SPARC64) | 3587 | #if !defined(TARGET_SPARC64) |
| 3587 | - env->mmuregs[0] = def->mmu_version; | 3588 | + env->mmuregs[0] |= def->mmu_version; |
| 3588 | #endif | 3589 | #endif |
| 3589 | return 0; | 3590 | return 0; |
| 3590 | } | 3591 | } |