gwj / at91sam9263 · Commits

Commit 405ee3ad573c35790500048d07d5c7ac93167e6a

Authored by balrog
1 parent 7bfe5777

Invalidate TLBs when domains are changed (Matthew Warton). 

Legalise cp15 pid register writes (Matthew Warton).


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3494 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 1 additions and 2 deletions
target-arm/helper.c
  View file @405ee3a
... ... @@ -704,6 +704,7 @@ void helper_set_cp15(CPUState *env, uint32_t insn, uint32_t val)
704 704 break;
705 705 case 3: /* MMU Domain access control / MPU write buffer control. */
706 706 env->cp15.c3 = val;
  707 + tlb_flush(env, 1); /* Flush TLB as domain not tracked in TLB */
707 708 break;
708 709 case 4: /* Reserved. */
709 710 goto bad_reg;
... ... @@ -814,8 +815,6 @@ void helper_set_cp15(CPUState *env, uint32_t insn, uint32_t val)
814 815 case 13: /* Process ID. */
815 816 switch (op2) {
816 817 case 0:
817   - if (!arm_feature(env, ARM_FEATURE_MPU))
818   - goto bad_reg;
819 818 /* Unlike real hardware the qemu TLB uses virtual addresses,
820 819 not modified virtual addresses, so this causes a TLB flush.
821 820 */
... ...