Commit 3f0436fe852f600b2685350f3f5f378b5d4ed0e1

Authored by blueswir1
1 parent c0b5b109

Eliminate cpu_T[1]

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4775 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 3 additions and 4 deletions
target-sparc/translate.c
@@ -1918,7 +1918,6 @@ static void disas_sparc_insn(DisasContext * dc) @@ -1918,7 +1918,6 @@ static void disas_sparc_insn(DisasContext * dc)
1918 1918
1919 // loads and stores 1919 // loads and stores
1920 cpu_addr = cpu_T[0]; 1920 cpu_addr = cpu_T[0];
1921 - cpu_val = cpu_T[1];  
1922 1921
1923 switch (opc) { 1922 switch (opc) {
1924 case 0: /* branches/sethi */ 1923 case 0: /* branches/sethi */
@@ -4745,6 +4744,7 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb, @@ -4745,6 +4744,7 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb,
4745 cpu_tmp0 = tcg_temp_new(TCG_TYPE_TL); 4744 cpu_tmp0 = tcg_temp_new(TCG_TYPE_TL);
4746 cpu_tmp32 = tcg_temp_new(TCG_TYPE_I32); 4745 cpu_tmp32 = tcg_temp_new(TCG_TYPE_I32);
4747 cpu_tmp64 = tcg_temp_new(TCG_TYPE_I64); 4746 cpu_tmp64 = tcg_temp_new(TCG_TYPE_I64);
  4747 + cpu_val = tcg_temp_local_new(TCG_TYPE_TL);
4748 4748
4749 do { 4749 do {
4750 if (env->nb_breakpoints > 0) { 4750 if (env->nb_breakpoints > 0) {
@@ -4795,6 +4795,7 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb, @@ -4795,6 +4795,7 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb,
4795 (dc->pc - pc_start) < (TARGET_PAGE_SIZE - 32)); 4795 (dc->pc - pc_start) < (TARGET_PAGE_SIZE - 32));
4796 4796
4797 exit_gen_loop: 4797 exit_gen_loop:
  4798 + tcg_temp_free(cpu_val);
4798 tcg_temp_free(cpu_tmp64); 4799 tcg_temp_free(cpu_tmp64);
4799 tcg_temp_free(cpu_tmp32); 4800 tcg_temp_free(cpu_tmp32);
4800 tcg_temp_free(cpu_tmp0); 4801 tcg_temp_free(cpu_tmp0);
@@ -4875,11 +4876,9 @@ void gen_intermediate_code_init(CPUSPARCState *env) @@ -4875,11 +4876,9 @@ void gen_intermediate_code_init(CPUSPARCState *env)
4875 TCG_AREG0, offsetof(CPUState, xcc), 4876 TCG_AREG0, offsetof(CPUState, xcc),
4876 "xcc"); 4877 "xcc");
4877 #endif 4878 #endif
4878 - /* XXX: T0 and T1 should be temporaries */ 4879 + /* XXX: T0 should be a temporary */
4879 cpu_T[0] = tcg_global_mem_new(TCG_TYPE_TL, 4880 cpu_T[0] = tcg_global_mem_new(TCG_TYPE_TL,
4880 TCG_AREG0, offsetof(CPUState, t0), "T0"); 4881 TCG_AREG0, offsetof(CPUState, t0), "T0");
4881 - cpu_T[1] = tcg_global_mem_new(TCG_TYPE_TL,  
4882 - TCG_AREG0, offsetof(CPUState, t1), "T1");  
4883 cpu_cond = tcg_global_mem_new(TCG_TYPE_TL, 4882 cpu_cond = tcg_global_mem_new(TCG_TYPE_TL,
4884 TCG_AREG0, offsetof(CPUState, cond), 4883 TCG_AREG0, offsetof(CPUState, cond),
4885 "cond"); 4884 "cond");