Commit 3ea8749da4a479441563b5edb9d5ad20c690311a

Authored by aurel32
1 parent d2856f1a

BIOS: Reenable processor SSDT generation. Don't advertise ACPI C2 or C3

support. Thanks to Avi Kivity for the pointer.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4275 c046a42c-6fe2-441c-8c8c-71466251a162
pc-bios/bios.bin
No preview for this file type
pc-bios/bios.diff
  1 +? _rombios_.c
  2 +? _rombiosl_.c
  3 +? biossums
  4 +? rombios.s
  5 +? rombios.sym
  6 +? rombios.txt
  7 +? rombios16.bin
  8 +? rombios32.bin
  9 +? rombios32.out
  10 +? rombiosl.s
  11 +? rombiosl.sym
  12 +? rombiosl.txt
  13 +Index: BIOS-bochs-latest
  14 +===================================================================
  15 +RCS file: /cvsroot/bochs/bochs/bios/BIOS-bochs-latest,v
  16 +retrieving revision 1.173
  17 +diff -u -d -p -r1.173 BIOS-bochs-latest
  18 +Binary files /tmp/cvsItPJ31 and BIOS-bochs-latest differ
  19 +Index: BIOS-bochs-legacy
  20 +===================================================================
  21 +RCS file: /cvsroot/bochs/bochs/bios/BIOS-bochs-legacy,v
  22 +retrieving revision 1.33
  23 +diff -u -d -p -r1.33 BIOS-bochs-legacy
  24 +Binary files /tmp/cvsMYE2Kz and BIOS-bochs-legacy differ
1 Index: rombios.c 25 Index: rombios.c
2 =================================================================== 26 ===================================================================
3 RCS file: /cvsroot/bochs/bochs/bios/rombios.c,v 27 RCS file: /cvsroot/bochs/bochs/bios/rombios.c,v
4 retrieving revision 1.207 28 retrieving revision 1.207
5 diff -u -d -p -r1.207 rombios.c 29 diff -u -d -p -r1.207 rombios.c
6 --- rombios.c 21 Apr 2008 14:22:01 -0000 1.207 30 --- rombios.c 21 Apr 2008 14:22:01 -0000 1.207
7 -+++ rombios.c 27 Apr 2008 23:40:19 -0000 31 ++++ rombios.c 28 Apr 2008 07:53:57 -0000
8 @@ -4404,22 +4404,25 @@ BX_DEBUG_INT15("case default:\n"); 32 @@ -4404,22 +4404,25 @@ BX_DEBUG_INT15("case default:\n");
9 #endif // BX_USE_PS2_MOUSE 33 #endif // BX_USE_PS2_MOUSE
10 34
@@ -128,7 +152,7 @@ RCS file: /cvsroot/bochs/bochs/bios/rombios.h,v @@ -128,7 +152,7 @@ RCS file: /cvsroot/bochs/bochs/bios/rombios.h,v
128 retrieving revision 1.6 152 retrieving revision 1.6
129 diff -u -d -p -r1.6 rombios.h 153 diff -u -d -p -r1.6 rombios.h
130 --- rombios.h 26 Jan 2008 09:15:27 -0000 1.6 154 --- rombios.h 26 Jan 2008 09:15:27 -0000 1.6
131 -+++ rombios.h 27 Apr 2008 23:40:19 -0000 155 ++++ rombios.h 28 Apr 2008 07:53:57 -0000
132 @@ -19,7 +19,7 @@ 156 @@ -19,7 +19,7 @@
133 // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 157 // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
134 158
@@ -144,7 +168,7 @@ RCS file: /cvsroot/bochs/bochs/bios/rombios32.c,v @@ -144,7 +168,7 @@ RCS file: /cvsroot/bochs/bochs/bios/rombios32.c,v
144 retrieving revision 1.26 168 retrieving revision 1.26
145 diff -u -d -p -r1.26 rombios32.c 169 diff -u -d -p -r1.26 rombios32.c
146 --- rombios32.c 8 Apr 2008 16:41:18 -0000 1.26 170 --- rombios32.c 8 Apr 2008 16:41:18 -0000 1.26
147 -+++ rombios32.c 27 Apr 2008 23:40:19 -0000 171 ++++ rombios32.c 28 Apr 2008 07:53:58 -0000
148 @@ -478,7 +478,12 @@ void smp_probe(void) 172 @@ -478,7 +478,12 @@ void smp_probe(void)
149 sipi_vector = AP_BOOT_ADDR >> 12; 173 sipi_vector = AP_BOOT_ADDR >> 12;
150 writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector); 174 writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
@@ -158,42 +182,15 @@ diff -u -d -p -r1.26 rombios32.c @@ -158,42 +182,15 @@ diff -u -d -p -r1.26 rombios32.c
158 182
159 smp_cpus = readw((void *)CPU_COUNT_ADDR); 183 smp_cpus = readw((void *)CPU_COUNT_ADDR);
160 } 184 }
161 -@@ -1081,7 +1086,7 @@ struct rsdp_descriptor /* Root S  
162 - struct rsdt_descriptor_rev1  
163 - {  
164 - ACPI_TABLE_HEADER_DEF /* ACPI common table header */  
165 -- uint32_t table_offset_entry [3]; /* Array of pointers to other */  
166 -+ uint32_t table_offset_entry [2]; /* Array of pointers to other */  
167 - /* ACPI tables */  
168 - };  
169 -  
170 -@@ -1335,8 +1340,8 @@ void acpi_bios_init(void)  
171 - struct fadt_descriptor_rev1 *fadt;  
172 - struct facs_descriptor_rev1 *facs;  
173 - struct multiple_apic_table *madt;  
174 -- uint8_t *dsdt, *ssdt;  
175 -- uint32_t base_addr, rsdt_addr, fadt_addr, addr, facs_addr, dsdt_addr, ssdt_addr;  
176 -+ uint8_t *dsdt;  
177 -+ uint32_t base_addr, rsdt_addr, fadt_addr, addr, facs_addr, dsdt_addr;  
178 - uint32_t acpi_tables_size, madt_addr, madt_size;  
179 - int i;  
180 -  
181 -@@ -1370,10 +1375,6 @@ void acpi_bios_init(void)  
182 - dsdt = (void *)(addr);  
183 - addr += sizeof(AmlCode);  
184 -  
185 -- ssdt_addr = addr;  
186 -- ssdt = (void *)(addr);  
187 -- addr += acpi_build_processor_ssdt(ssdt);  
188 --  
189 - addr = (addr + 7) & ~7;  
190 - madt_addr = addr;  
191 - madt_size = sizeof(*madt) +  
192 -@@ -1403,7 +1404,6 @@ void acpi_bios_init(void)  
193 - memset(rsdt, 0, sizeof(*rsdt));  
194 - rsdt->table_offset_entry[0] = cpu_to_le32(fadt_addr);  
195 - rsdt->table_offset_entry[1] = cpu_to_le32(madt_addr);  
196 -- rsdt->table_offset_entry[2] = cpu_to_le32(ssdt_addr);  
197 - acpi_build_table_header((struct acpi_table_header *)rsdt,  
198 - "RSDT", sizeof(*rsdt), 1);  
199 - 185 +@@ -1423,9 +1428,8 @@ void acpi_bios_init(void)
  186 + fadt->pm1_evt_len = 4;
  187 + fadt->pm1_cnt_len = 2;
  188 + fadt->pm_tmr_len = 4;
  189 +- fadt->plvl2_lat = cpu_to_le16(50);
  190 +- fadt->plvl3_lat = cpu_to_le16(50);
  191 +- fadt->plvl3_lat = cpu_to_le16(50);
  192 ++ fadt->plvl2_lat = cpu_to_le16(0x0fff); // C2 state not supported
  193 ++ fadt->plvl3_lat = cpu_to_le16(0x0fff); // C3 state not supported
  194 + /* WBINVD + PROC_C1 + PWR_BUTTON + SLP_BUTTON + FIX_RTC */
  195 + fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 4) | (1 << 5) | (1 << 6));
  196 + acpi_build_table_header((struct acpi_table_header *)fadt, "FACP",