Commit 3dd9a152e1776c8a99cf5030a2a89db642d6ef43
1 parent
b76482e7
More MMU registers (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3738 c046a42c-6fe2-441c-8c8c-71466251a162
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2 changed files
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18 additions
and
7 deletions
target-sparc/cpu.h
| @@ -215,7 +215,7 @@ typedef struct CPUSPARCState { | @@ -215,7 +215,7 @@ typedef struct CPUSPARCState { | ||
| 215 | uint64_t dtlb_tag[64]; | 215 | uint64_t dtlb_tag[64]; |
| 216 | uint64_t dtlb_tte[64]; | 216 | uint64_t dtlb_tte[64]; |
| 217 | #else | 217 | #else |
| 218 | - uint32_t mmuregs[16]; | 218 | + uint32_t mmuregs[32]; |
| 219 | uint64_t mxccdata[4]; | 219 | uint64_t mxccdata[4]; |
| 220 | uint64_t mxccregs[8]; | 220 | uint64_t mxccregs[8]; |
| 221 | #endif | 221 | #endif |
target-sparc/op_helper.c
| @@ -248,11 +248,15 @@ void helper_ld_asi(int asi, int size, int sign) | @@ -248,11 +248,15 @@ void helper_ld_asi(int asi, int size, int sign) | ||
| 248 | break; | 248 | break; |
| 249 | case 4: /* read MMU regs */ | 249 | case 4: /* read MMU regs */ |
| 250 | { | 250 | { |
| 251 | - int reg = (T0 >> 8) & 0xf; | 251 | + int reg = (T0 >> 8) & 0x1f; |
| 252 | 252 | ||
| 253 | ret = env->mmuregs[reg]; | 253 | ret = env->mmuregs[reg]; |
| 254 | if (reg == 3) /* Fault status cleared on read */ | 254 | if (reg == 3) /* Fault status cleared on read */ |
| 255 | - env->mmuregs[reg] = 0; | 255 | + env->mmuregs[3] = 0; |
| 256 | + else if (reg == 0x13) /* Fault status read */ | ||
| 257 | + ret = env->mmuregs[3]; | ||
| 258 | + else if (reg == 0x14) /* Fault address read */ | ||
| 259 | + ret = env->mmuregs[4]; | ||
| 256 | DPRINTF_MMU("mmu_read: reg[%d] = 0x%08x\n", reg, ret); | 260 | DPRINTF_MMU("mmu_read: reg[%d] = 0x%08x\n", reg, ret); |
| 257 | } | 261 | } |
| 258 | break; | 262 | break; |
| @@ -493,17 +497,18 @@ void helper_st_asi(int asi, int size) | @@ -493,17 +497,18 @@ void helper_st_asi(int asi, int size) | ||
| 493 | } | 497 | } |
| 494 | case 4: /* write MMU regs */ | 498 | case 4: /* write MMU regs */ |
| 495 | { | 499 | { |
| 496 | - int reg = (T0 >> 8) & 0xf; | 500 | + int reg = (T0 >> 8) & 0x1f; |
| 497 | uint32_t oldreg; | 501 | uint32_t oldreg; |
| 498 | 502 | ||
| 499 | oldreg = env->mmuregs[reg]; | 503 | oldreg = env->mmuregs[reg]; |
| 500 | switch(reg) { | 504 | switch(reg) { |
| 501 | case 0: | 505 | case 0: |
| 502 | - env->mmuregs[reg] &= ~(MMU_E | MMU_NF | env->mmu_bm); | ||
| 503 | - env->mmuregs[reg] |= T1 & (MMU_E | MMU_NF | env->mmu_bm); | 506 | + env->mmuregs[reg] = (env->mmuregs[reg] & 0xff000000) | |
| 507 | + (T1 & 0x00ffffff); | ||
| 504 | // Mappings generated during no-fault mode or MMU | 508 | // Mappings generated during no-fault mode or MMU |
| 505 | // disabled mode are invalid in normal mode | 509 | // disabled mode are invalid in normal mode |
| 506 | - if (oldreg != env->mmuregs[reg]) | 510 | + if ((oldreg & (MMU_E | MMU_NF | env->mmu_bm)) != |
| 511 | + (env->mmuregs[reg] & (MMU_E | MMU_NF | env->mmu_bm))) | ||
| 507 | tlb_flush(env, 1); | 512 | tlb_flush(env, 1); |
| 508 | break; | 513 | break; |
| 509 | case 2: | 514 | case 2: |
| @@ -517,6 +522,12 @@ void helper_st_asi(int asi, int size) | @@ -517,6 +522,12 @@ void helper_st_asi(int asi, int size) | ||
| 517 | case 3: | 522 | case 3: |
| 518 | case 4: | 523 | case 4: |
| 519 | break; | 524 | break; |
| 525 | + case 0x13: | ||
| 526 | + env->mmuregs[3] = T1; | ||
| 527 | + break; | ||
| 528 | + case 0x14: | ||
| 529 | + env->mmuregs[4] = T1; | ||
| 530 | + break; | ||
| 520 | default: | 531 | default: |
| 521 | env->mmuregs[reg] = T1; | 532 | env->mmuregs[reg] = T1; |
| 522 | break; | 533 | break; |