Commit 3d57da2a70c0737d388b79f591e86a2821355c92

Authored by bellard
1 parent 00406dff

suppressed dummy FPU ops


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@610 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 0 additions and 60 deletions
target-arm/translate.c
@@ -708,66 +708,6 @@ static void disas_arm_insn(DisasContext *s) @@ -708,66 +708,6 @@ static void disas_arm_insn(DisasContext *s)
708 gen_op_swi(); 708 gen_op_swi();
709 s->is_jmp = DISAS_JUMP; 709 s->is_jmp = DISAS_JUMP;
710 break; 710 break;
711 - case 0xc:  
712 - case 0xd:  
713 - rd = (insn >> 12) & 0x7;  
714 - rn = (insn >> 16) & 0xf;  
715 - gen_movl_T1_reg(s, rn);  
716 - val = (insn) & 0xff;  
717 - if (!(insn & (1 << 23)))  
718 - val = -val;  
719 - switch((insn >> 8) & 0xf) {  
720 - case 0x1:  
721 - /* load/store */  
722 - if ((insn & (1 << 24)))  
723 - gen_op_addl_T1_im(val);  
724 - /* XXX: do it */  
725 - if (!(insn & (1 << 24)))  
726 - gen_op_addl_T1_im(val);  
727 - if (insn & (1 << 21))  
728 - gen_movl_reg_T1(s, rn);  
729 - break;  
730 - case 0x2:  
731 - {  
732 - int n, i;  
733 - /* load store multiple */  
734 - if ((insn & (1 << 24)))  
735 - gen_op_addl_T1_im(val);  
736 - switch(insn & 0x00408000) {  
737 - case 0x00008000: n = 1; break;  
738 - case 0x00400000: n = 2; break;  
739 - case 0x00408000: n = 3; break;  
740 - default: n = 4; break;  
741 - }  
742 - for(i = 0;i < n; i++) {  
743 - /* XXX: do it */  
744 - }  
745 - if (!(insn & (1 << 24)))  
746 - gen_op_addl_T1_im(val);  
747 - if (insn & (1 << 21))  
748 - gen_movl_reg_T1(s, rn);  
749 - }  
750 - break;  
751 - default:  
752 - goto illegal_op;  
753 - }  
754 - break;  
755 - case 0x0e:  
756 - /* float ops */  
757 - /* XXX: do it */  
758 - switch((insn >> 20) & 0xf) {  
759 - case 0x2: /* wfs */  
760 - break;  
761 - case 0x3: /* rfs */  
762 - break;  
763 - case 0x4: /* wfc */  
764 - break;  
765 - case 0x5: /* rfc */  
766 - break;  
767 - default:  
768 - goto illegal_op;  
769 - }  
770 - break;  
771 default: 711 default:
772 illegal_op: 712 illegal_op:
773 gen_op_movl_T0_im((long)s->pc - 4); 713 gen_op_movl_T0_im((long)s->pc - 4);