Commit 3cf1e035ba16423d1278ac34bea2ec795a9716a3

Authored by bellard
1 parent a6b025d3

added TARGET_LONG_BITS


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@580 c046a42c-6fe2-441c-8c8c-71466251a162
target-arm/cpu.h
@@ -20,6 +20,8 @@ @@ -20,6 +20,8 @@
20 #ifndef CPU_ARM_H 20 #ifndef CPU_ARM_H
21 #define CPU_ARM_H 21 #define CPU_ARM_H
22 22
  23 +#define TARGET_LONG_BITS 32
  24 +
23 #include "cpu-defs.h" 25 #include "cpu-defs.h"
24 26
25 #define EXCP_UDEF 1 /* undefined instruction */ 27 #define EXCP_UDEF 1 /* undefined instruction */
target-i386/cpu.h
@@ -20,6 +20,8 @@ @@ -20,6 +20,8 @@
20 #ifndef CPU_I386_H 20 #ifndef CPU_I386_H
21 #define CPU_I386_H 21 #define CPU_I386_H
22 22
  23 +#define TARGET_LONG_BITS 32
  24 +
23 #include "cpu-defs.h" 25 #include "cpu-defs.h"
24 26
25 #define R_EAX 0 27 #define R_EAX 0
target-ppc/cpu.h
@@ -23,6 +23,8 @@ @@ -23,6 +23,8 @@
23 #include <endian.h> 23 #include <endian.h>
24 #include <asm/byteorder.h> 24 #include <asm/byteorder.h>
25 25
  26 +#define TARGET_LONG_BITS 32
  27 +
26 #include "cpu-defs.h" 28 #include "cpu-defs.h"
27 29
28 //#define USE_OPEN_FIRMWARE 30 //#define USE_OPEN_FIRMWARE
target-sparc/cpu.h
1 #ifndef CPU_SPARC_H 1 #ifndef CPU_SPARC_H
2 #define CPU_SPARC_H 2 #define CPU_SPARC_H
3 3
4 -#include <setjmp.h>  
5 -#include "config.h" 4 +#define TARGET_LONG_BITS 32
  5 +
6 #include "cpu-defs.h" 6 #include "cpu-defs.h"
7 7
8 /*#define EXCP_INTERRUPT 0x100*/ 8 /*#define EXCP_INTERRUPT 0x100*/