gwj / at91sam9263 · Commits

Commit 3b2d1e9286e1ddbb36499c9fd59e14b736441969

Authored by Blue Swirl
1 parent 2ca1d92b

Convert tagged ops 

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Inline Side-by-side
Showing 2 changed files with 85 additions and 129 deletions
target-sparc/op_helper.c
  View file @3b2d1e9
... ... @@ -902,6 +902,45 @@ static uint32_t compute_C_addx_xcc(void)
902 902 }
903 903 #endif
904 904  
  905 +static inline uint32_t get_V_tag_icc(target_ulong src1, target_ulong src2)
  906 +{
  907 + uint32_t ret = 0;
  908 +
  909 + if ((src1 | src2) & 0x3)
  910 + ret |= PSR_OVF;
  911 + return ret;
  912 +}
  913 +
  914 +static uint32_t compute_all_tadd(void)
  915 +{
  916 + uint32_t ret;
  917 +
  918 + ret = get_NZ_icc(CC_DST);
  919 + ret |= get_C_add_icc(CC_DST, CC_SRC);
  920 + ret |= get_V_add_icc(CC_DST, CC_SRC, CC_SRC2);
  921 + ret |= get_V_tag_icc(CC_SRC, CC_SRC2);
  922 + return ret;
  923 +}
  924 +
  925 +static uint32_t compute_C_tadd(void)
  926 +{
  927 + return get_C_add_icc(CC_DST, CC_SRC);
  928 +}
  929 +
  930 +static uint32_t compute_all_taddtv(void)
  931 +{
  932 + uint32_t ret;
  933 +
  934 + ret = get_NZ_icc(CC_DST);
  935 + ret |= get_C_add_icc(CC_DST, CC_SRC);
  936 + return ret;
  937 +}
  938 +
  939 +static uint32_t compute_C_taddtv(void)
  940 +{
  941 + return get_C_add_icc(CC_DST, CC_SRC);
  942 +}
  943 +
905 944 static inline uint32_t get_C_sub_icc(target_ulong src1, target_ulong src2)
906 945 {
907 946 uint32_t ret = 0;
... ... @@ -1014,6 +1053,36 @@ static uint32_t compute_C_subx_xcc(void)
1014 1053 }
1015 1054 #endif
1016 1055  
  1056 +static uint32_t compute_all_tsub(void)
  1057 +{
  1058 + uint32_t ret;
  1059 +
  1060 + ret = get_NZ_icc(CC_DST);
  1061 + ret |= get_C_sub_icc(CC_DST, CC_SRC);
  1062 + ret |= get_V_sub_icc(CC_DST, CC_SRC, CC_SRC2);
  1063 + ret |= get_V_tag_icc(CC_SRC, CC_SRC2);
  1064 + return ret;
  1065 +}
  1066 +
  1067 +static uint32_t compute_C_tsub(void)
  1068 +{
  1069 + return get_C_sub_icc(CC_DST, CC_SRC);
  1070 +}
  1071 +
  1072 +static uint32_t compute_all_tsubtv(void)
  1073 +{
  1074 + uint32_t ret;
  1075 +
  1076 + ret = get_NZ_icc(CC_DST);
  1077 + ret |= get_C_sub_icc(CC_DST, CC_SRC);
  1078 + return ret;
  1079 +}
  1080 +
  1081 +static uint32_t compute_C_tsubtv(void)
  1082 +{
  1083 + return get_C_sub_icc(CC_DST, CC_SRC);
  1084 +}
  1085 +
1017 1086 static uint32_t compute_all_logic(void)
1018 1087 {
1019 1088 return get_NZ_icc(CC_DST);
... ... @@ -1041,8 +1110,12 @@ static const CCTable icc_table[CC_OP_NB] = {
1041 1110 [CC_OP_FLAGS] = { compute_all_flags, compute_C_flags },
1042 1111 [CC_OP_ADD] = { compute_all_add, compute_C_add },
1043 1112 [CC_OP_ADDX] = { compute_all_addx, compute_C_addx },
  1113 + [CC_OP_TADD] = { compute_all_tadd, compute_C_tadd },
  1114 + [CC_OP_TADDTV] = { compute_all_taddtv, compute_C_taddtv },
1044 1115 [CC_OP_SUB] = { compute_all_sub, compute_C_sub },
1045 1116 [CC_OP_SUBX] = { compute_all_subx, compute_C_subx },
  1117 + [CC_OP_TSUB] = { compute_all_tsub, compute_C_tsub },
  1118 + [CC_OP_TSUBTV] = { compute_all_tsubtv, compute_C_tsubtv },
1046 1119 [CC_OP_LOGIC] = { compute_all_logic, compute_C_logic },
1047 1120 };
1048 1121  
... ... @@ -1052,8 +1125,12 @@ static const CCTable xcc_table[CC_OP_NB] = {
1052 1125 [CC_OP_FLAGS] = { compute_all_flags_xcc, compute_C_flags_xcc },
1053 1126 [CC_OP_ADD] = { compute_all_add_xcc, compute_C_add_xcc },
1054 1127 [CC_OP_ADDX] = { compute_all_addx_xcc, compute_C_addx_xcc },
  1128 + [CC_OP_TADD] = { compute_all_add_xcc, compute_C_add_xcc },
  1129 + [CC_OP_TADDTV] = { compute_all_add_xcc, compute_C_add_xcc },
1055 1130 [CC_OP_SUB] = { compute_all_sub_xcc, compute_C_sub_xcc },
1056 1131 [CC_OP_SUBX] = { compute_all_subx_xcc, compute_C_subx_xcc },
  1132 + [CC_OP_TSUB] = { compute_all_sub_xcc, compute_C_sub_xcc },
  1133 + [CC_OP_TSUBTV] = { compute_all_sub_xcc, compute_C_sub_xcc },
1057 1134 [CC_OP_LOGIC] = { compute_all_logic_xcc, compute_C_logic },
1058 1135 };
1059 1136 #endif
... ...
target-sparc/translate.c
  View file @3b2d1e9
... ... @@ -420,18 +420,6 @@ static inline void gen_add_tv(TCGv dst, TCGv src1, TCGv src2)
420 420 tcg_temp_free(r_temp);
421 421 }
422 422  
423   -static inline void gen_cc_V_tag(TCGv src1, TCGv src2)
424   -{
425   - int l1;
426   -
427   - l1 = gen_new_label();
428   - tcg_gen_or_tl(cpu_tmp0, src1, src2);
429   - tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0x3);
430   - tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1);
431   - tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF);
432   - gen_set_label(l1);
433   -}
434   -
435 423 static inline void gen_tag_tv(TCGv src1, TCGv src2)
436 424 {
437 425 int l1;
... ... @@ -488,17 +476,6 @@ static inline void gen_op_tadd_cc(TCGv dst, TCGv src1, TCGv src2)
488 476 tcg_gen_mov_tl(cpu_cc_src, src1);
489 477 tcg_gen_mov_tl(cpu_cc_src2, src2);
490 478 tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
491   - gen_cc_clear_icc();
492   - gen_cc_NZ_icc(cpu_cc_dst);
493   - gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src);
494   - gen_cc_V_add_icc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
495   - gen_cc_V_tag(cpu_cc_src, cpu_cc_src2);
496   -#ifdef TARGET_SPARC64
497   - gen_cc_clear_xcc();
498   - gen_cc_NZ_xcc(cpu_cc_dst);
499   - gen_cc_C_add_xcc(cpu_cc_dst, cpu_cc_src);
500   - gen_cc_V_add_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
501   -#endif
502 479 tcg_gen_mov_tl(dst, cpu_cc_dst);
503 480 }
504 481  
... ... @@ -509,87 +486,9 @@ static inline void gen_op_tadd_ccTV(TCGv dst, TCGv src1, TCGv src2)
509 486 gen_tag_tv(cpu_cc_src, cpu_cc_src2);
510 487 tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
511 488 gen_add_tv(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
512   - gen_cc_clear_icc();
513   - gen_cc_NZ_icc(cpu_cc_dst);
514   - gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src);
515   -#ifdef TARGET_SPARC64
516   - gen_cc_clear_xcc();
517   - gen_cc_NZ_xcc(cpu_cc_dst);
518   - gen_cc_C_add_xcc(cpu_cc_dst, cpu_cc_src);
519   - gen_cc_V_add_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
520   -#endif
521 489 tcg_gen_mov_tl(dst, cpu_cc_dst);
522 490 }
523 491  
524   -/* old op:
525   - if (src1 < T1)
526   - env->psr |= PSR_CARRY;
527   -*/
528   -static inline void gen_cc_C_sub_icc(TCGv src1, TCGv src2)
529   -{
530   - TCGv r_temp1, r_temp2;
531   - int l1;
532   -
533   - l1 = gen_new_label();
534   - r_temp1 = tcg_temp_new();
535   - r_temp2 = tcg_temp_new();
536   - tcg_gen_andi_tl(r_temp1, src1, 0xffffffffULL);
537   - tcg_gen_andi_tl(r_temp2, src2, 0xffffffffULL);
538   - tcg_gen_brcond_tl(TCG_COND_GEU, r_temp1, r_temp2, l1);
539   - tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_CARRY);
540   - gen_set_label(l1);
541   - tcg_temp_free(r_temp1);
542   - tcg_temp_free(r_temp2);
543   -}
544   -
545   -#ifdef TARGET_SPARC64
546   -static inline void gen_cc_C_sub_xcc(TCGv src1, TCGv src2)
547   -{
548   - int l1;
549   -
550   - l1 = gen_new_label();
551   - tcg_gen_brcond_tl(TCG_COND_GEU, src1, src2, l1);
552   - tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_CARRY);
553   - gen_set_label(l1);
554   -}
555   -#endif
556   -
557   -/* old op:
558   - if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31))
559   - env->psr |= PSR_OVF;
560   -*/
561   -static inline void gen_cc_V_sub_icc(TCGv dst, TCGv src1, TCGv src2)
562   -{
563   - TCGv r_temp;
564   -
565   - r_temp = tcg_temp_new();
566   - tcg_gen_xor_tl(r_temp, src1, src2);
567   - tcg_gen_xor_tl(cpu_tmp0, src1, dst);
568   - tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
569   - tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 31));
570   - tcg_gen_shri_tl(r_temp, r_temp, 31 - PSR_OVF_SHIFT);
571   - tcg_gen_trunc_tl_i32(cpu_tmp32, r_temp);
572   - tcg_gen_or_i32(cpu_psr, cpu_psr, cpu_tmp32);
573   - tcg_temp_free(r_temp);
574   -}
575   -
576   -#ifdef TARGET_SPARC64
577   -static inline void gen_cc_V_sub_xcc(TCGv dst, TCGv src1, TCGv src2)
578   -{
579   - TCGv r_temp;
580   -
581   - r_temp = tcg_temp_new();
582   - tcg_gen_xor_tl(r_temp, src1, src2);
583   - tcg_gen_xor_tl(cpu_tmp0, src1, dst);
584   - tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
585   - tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 63));
586   - tcg_gen_shri_tl(r_temp, r_temp, 63 - PSR_OVF_SHIFT);
587   - tcg_gen_trunc_tl_i32(cpu_tmp32, r_temp);
588   - tcg_gen_or_i32(cpu_xcc, cpu_xcc, cpu_tmp32);
589   - tcg_temp_free(r_temp);
590   -}
591   -#endif
592   -
593 492 static inline void gen_sub_tv(TCGv dst, TCGv src1, TCGv src2)
594 493 {
595 494 TCGv r_temp;
... ... @@ -660,17 +559,6 @@ static inline void gen_op_tsub_cc(TCGv dst, TCGv src1, TCGv src2)
660 559 tcg_gen_mov_tl(cpu_cc_src, src1);
661 560 tcg_gen_mov_tl(cpu_cc_src2, src2);
662 561 tcg_gen_sub_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
663   - gen_cc_clear_icc();
664   - gen_cc_NZ_icc(cpu_cc_dst);
665   - gen_cc_C_sub_icc(cpu_cc_src, cpu_cc_src2);
666   - gen_cc_V_sub_icc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
667   - gen_cc_V_tag(cpu_cc_src, cpu_cc_src2);
668   -#ifdef TARGET_SPARC64
669   - gen_cc_clear_xcc();
670   - gen_cc_NZ_xcc(cpu_cc_dst);
671   - gen_cc_C_sub_xcc(cpu_cc_src, cpu_cc_src2);
672   - gen_cc_V_sub_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
673   -#endif
674 562 tcg_gen_mov_tl(dst, cpu_cc_dst);
675 563 }
676 564  
... ... @@ -681,15 +569,6 @@ static inline void gen_op_tsub_ccTV(TCGv dst, TCGv src1, TCGv src2)
681 569 gen_tag_tv(cpu_cc_src, cpu_cc_src2);
682 570 tcg_gen_sub_tl(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
683 571 gen_sub_tv(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
684   - gen_cc_clear_icc();
685   - gen_cc_NZ_icc(cpu_cc_dst);
686   - gen_cc_C_sub_icc(cpu_cc_src, cpu_cc_src2);
687   -#ifdef TARGET_SPARC64
688   - gen_cc_clear_xcc();
689   - gen_cc_NZ_xcc(cpu_cc_dst);
690   - gen_cc_C_sub_xcc(cpu_cc_src, cpu_cc_src2);
691   - gen_cc_V_sub_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);
692   -#endif
693 572 tcg_gen_mov_tl(dst, cpu_cc_dst);
694 573 }
695 574  
... ... @@ -3297,28 +3176,28 @@ static void disas_sparc_insn(DisasContext * dc)
3297 3176 case 0x20: /* taddcc */
3298 3177 gen_op_tadd_cc(cpu_dst, cpu_src1, cpu_src2);
3299 3178 gen_movl_TN_reg(rd, cpu_dst);
3300   - tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
3301   - dc->cc_op = CC_OP_FLAGS;
  3179 + tcg_gen_movi_i32(cpu_cc_op, CC_OP_TADD);
  3180 + dc->cc_op = CC_OP_TADD;
3302 3181 break;
3303 3182 case 0x21: /* tsubcc */
3304 3183 gen_op_tsub_cc(cpu_dst, cpu_src1, cpu_src2);
3305 3184 gen_movl_TN_reg(rd, cpu_dst);
3306   - tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
3307   - dc->cc_op = CC_OP_FLAGS;
  3185 + tcg_gen_movi_i32(cpu_cc_op, CC_OP_TSUB);
  3186 + dc->cc_op = CC_OP_TSUB;
3308 3187 break;
3309 3188 case 0x22: /* taddcctv */
3310 3189 save_state(dc, cpu_cond);
3311 3190 gen_op_tadd_ccTV(cpu_dst, cpu_src1, cpu_src2);
3312 3191 gen_movl_TN_reg(rd, cpu_dst);
3313   - tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
3314   - dc->cc_op = CC_OP_FLAGS;
  3192 + tcg_gen_movi_i32(cpu_cc_op, CC_OP_TADDTV);
  3193 + dc->cc_op = CC_OP_TADDTV;
3315 3194 break;
3316 3195 case 0x23: /* tsubcctv */
3317 3196 save_state(dc, cpu_cond);
3318 3197 gen_op_tsub_ccTV(cpu_dst, cpu_src1, cpu_src2);
3319 3198 gen_movl_TN_reg(rd, cpu_dst);
3320   - tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);
3321   - dc->cc_op = CC_OP_FLAGS;
  3199 + tcg_gen_movi_i32(cpu_cc_op, CC_OP_TSUBTV);
  3200 + dc->cc_op = CC_OP_TSUBTV;
3322 3201 break;
3323 3202 case 0x24: /* mulscc */
3324 3203 gen_helper_compute_psr();
... ...