Commit 3b1fd90ed13ce9674de80cc1d1e1d7241d0f0796

Authored by Edgar E. Iglesias
1 parent 84ceea57

ETRAX-TIMER: qdevify.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
hw/axis_dev88.c
@@ -316,12 +316,12 @@ void axisdev88_init (ram_addr_t ram_size, @@ -316,12 +316,12 @@ void axisdev88_init (ram_addr_t ram_size,
316 } 316 }
317 317
318 /* 2 timers. */ 318 /* 2 timers. */
319 - etraxfs_timer_init(env, irq + 0x1b, nmi + 1, 0x3001e000);  
320 - etraxfs_timer_init(env, irq + 0x1b, nmi + 1, 0x3005e000); 319 + sysbus_create_varargs("etraxfs,timer", 0x3001e000, irq[0x1b], nmi[1], NULL);
  320 + sysbus_create_varargs("etraxfs,timer", 0x3005e000, irq[0x1b], nmi[1], NULL);
321 321
322 for (i = 0; i < 4; i++) { 322 for (i = 0; i < 4; i++) {
323 sysbus_create_simple("etraxfs,serial", 0x30026000 + i * 0x2000, 323 sysbus_create_simple("etraxfs,serial", 0x30026000 + i * 0x2000,
324 - irq[0x14 + i]); 324 + irq[0x14 + i]);
325 } 325 }
326 326
327 if (kernel_filename) { 327 if (kernel_filename) {
hw/etraxfs.c
@@ -26,6 +26,7 @@ @@ -26,6 +26,7 @@
26 #include "boards.h" 26 #include "boards.h"
27 #include "sysemu.h" 27 #include "sysemu.h"
28 #include "net.h" 28 #include "net.h"
  29 +#include "flash.h"
29 #include "etraxfs.h" 30 #include "etraxfs.h"
30 31
31 #define FLASH_SIZE 0x2000000 32 #define FLASH_SIZE 0x2000000
@@ -106,8 +107,8 @@ void bareetraxfs_init (ram_addr_t ram_size, @@ -106,8 +107,8 @@ void bareetraxfs_init (ram_addr_t ram_size,
106 } 107 }
107 108
108 /* 2 timers. */ 109 /* 2 timers. */
109 - etraxfs_timer_init(env, irq + 0x1b, nmi + 1, 0x3001e000);  
110 - etraxfs_timer_init(env, irq + 0x1b, nmi + 1, 0x3005e000); 110 + sysbus_create_varargs("etraxfs,timer", 0x3001e000, irq[0x1b], nmi[1], NULL);
  111 + sysbus_create_varargs("etraxfs,timer", 0x3005e000, irq[0x1b], nmi[1], NULL);
111 112
112 for (i = 0; i < 4; i++) { 113 for (i = 0; i < 4; i++) {
113 sysbus_create_simple("etraxfs,serial", 0x30026000 + i * 0x2000, 114 sysbus_create_simple("etraxfs,serial", 0x30026000 + i * 0x2000,
hw/etraxfs.h
@@ -25,9 +25,5 @@ @@ -25,9 +25,5 @@
25 #include "etraxfs_dma.h" 25 #include "etraxfs_dma.h"
26 26
27 qemu_irq *etraxfs_pic_init(CPUState *env, target_phys_addr_t base); 27 qemu_irq *etraxfs_pic_init(CPUState *env, target_phys_addr_t base);
28 -void etraxfs_timer_init(CPUState *env, qemu_irq *irqs, qemu_irq *nmi,  
29 - target_phys_addr_t base);  
30 void *etraxfs_eth_init(NICInfo *nd, CPUState *env, 28 void *etraxfs_eth_init(NICInfo *nd, CPUState *env,
31 qemu_irq *irq, target_phys_addr_t base, int phyaddr); 29 qemu_irq *irq, target_phys_addr_t base, int phyaddr);
32 -//void etraxfs_ser_init(CPUState *env, qemu_irq *irq, CharDriverState *chr,  
33 -// target_phys_addr_t base);  
hw/etraxfs_timer.c
@@ -21,12 +21,9 @@ @@ -21,12 +21,9 @@
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE. 22 * THE SOFTWARE.
23 */ 23 */
24 -#include <stdio.h>  
25 -#include <sys/time.h>  
26 -#include "hw.h" 24 +#include "sysbus.h"
27 #include "sysemu.h" 25 #include "sysemu.h"
28 #include "qemu-timer.h" 26 #include "qemu-timer.h"
29 -#include "etraxfs.h"  
30 27
31 #define D(x) 28 #define D(x)
32 29
@@ -44,10 +41,10 @@ @@ -44,10 +41,10 @@
44 #define R_INTR 0x50 41 #define R_INTR 0x50
45 #define R_MASKED_INTR 0x54 42 #define R_MASKED_INTR 0x54
46 43
47 -struct fs_timer_t {  
48 - CPUState *env;  
49 - qemu_irq *irq;  
50 - qemu_irq *nmi; 44 +struct etrax_timer {
  45 + SysBusDevice busdev;
  46 + qemu_irq irq;
  47 + qemu_irq nmi;
51 48
52 QEMUBH *bh_t0; 49 QEMUBH *bh_t0;
53 QEMUBH *bh_t1; 50 QEMUBH *bh_t1;
@@ -78,7 +75,7 @@ struct fs_timer_t { @@ -78,7 +75,7 @@ struct fs_timer_t {
78 75
79 static uint32_t timer_readl (void *opaque, target_phys_addr_t addr) 76 static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
80 { 77 {
81 - struct fs_timer_t *t = opaque; 78 + struct etrax_timer *t = opaque;
82 uint32_t r = 0; 79 uint32_t r = 0;
83 80
84 switch (addr) { 81 switch (addr) {
@@ -105,7 +102,7 @@ static uint32_t timer_readl (void *opaque, target_phys_addr_t addr) @@ -105,7 +102,7 @@ static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
105 } 102 }
106 103
107 #define TIMER_SLOWDOWN 1 104 #define TIMER_SLOWDOWN 1
108 -static void update_ctrl(struct fs_timer_t *t, int tnum) 105 +static void update_ctrl(struct etrax_timer *t, int tnum)
109 { 106 {
110 unsigned int op; 107 unsigned int op;
111 unsigned int freq; 108 unsigned int freq;
@@ -172,38 +169,38 @@ static void update_ctrl(struct fs_timer_t *t, int tnum) @@ -172,38 +169,38 @@ static void update_ctrl(struct fs_timer_t *t, int tnum)
172 } 169 }
173 } 170 }
174 171
175 -static void timer_update_irq(struct fs_timer_t *t) 172 +static void timer_update_irq(struct etrax_timer *t)
176 { 173 {
177 t->r_intr &= ~(t->rw_ack_intr); 174 t->r_intr &= ~(t->rw_ack_intr);
178 t->r_masked_intr = t->r_intr & t->rw_intr_mask; 175 t->r_masked_intr = t->r_intr & t->rw_intr_mask;
179 176
180 D(printf("%s: masked_intr=%x\n", __func__, t->r_masked_intr)); 177 D(printf("%s: masked_intr=%x\n", __func__, t->r_masked_intr));
181 - qemu_set_irq(t->irq[0], !!t->r_masked_intr); 178 + qemu_set_irq(t->irq, !!t->r_masked_intr);
182 } 179 }
183 180
184 static void timer0_hit(void *opaque) 181 static void timer0_hit(void *opaque)
185 { 182 {
186 - struct fs_timer_t *t = opaque; 183 + struct etrax_timer *t = opaque;
187 t->r_intr |= 1; 184 t->r_intr |= 1;
188 timer_update_irq(t); 185 timer_update_irq(t);
189 } 186 }
190 187
191 static void timer1_hit(void *opaque) 188 static void timer1_hit(void *opaque)
192 { 189 {
193 - struct fs_timer_t *t = opaque; 190 + struct etrax_timer *t = opaque;
194 t->r_intr |= 2; 191 t->r_intr |= 2;
195 timer_update_irq(t); 192 timer_update_irq(t);
196 } 193 }
197 194
198 static void watchdog_hit(void *opaque) 195 static void watchdog_hit(void *opaque)
199 { 196 {
200 - struct fs_timer_t *t = opaque; 197 + struct etrax_timer *t = opaque;
201 if (t->wd_hits == 0) { 198 if (t->wd_hits == 0) {
202 /* real hw gives a single tick before reseting but we are 199 /* real hw gives a single tick before reseting but we are
203 a bit friendlier to compensate for our slower execution. */ 200 a bit friendlier to compensate for our slower execution. */
204 ptimer_set_count(t->ptimer_wd, 10); 201 ptimer_set_count(t->ptimer_wd, 10);
205 ptimer_run(t->ptimer_wd, 1); 202 ptimer_run(t->ptimer_wd, 1);
206 - qemu_irq_raise(t->nmi[0]); 203 + qemu_irq_raise(t->nmi);
207 } 204 }
208 else 205 else
209 qemu_system_reset_request(); 206 qemu_system_reset_request();
@@ -211,7 +208,7 @@ static void watchdog_hit(void *opaque) @@ -211,7 +208,7 @@ static void watchdog_hit(void *opaque)
211 t->wd_hits++; 208 t->wd_hits++;
212 } 209 }
213 210
214 -static inline void timer_watchdog_update(struct fs_timer_t *t, uint32_t value) 211 +static inline void timer_watchdog_update(struct etrax_timer *t, uint32_t value)
215 { 212 {
216 unsigned int wd_en = t->rw_wd_ctrl & (1 << 8); 213 unsigned int wd_en = t->rw_wd_ctrl & (1 << 8);
217 unsigned int wd_key = t->rw_wd_ctrl >> 9; 214 unsigned int wd_key = t->rw_wd_ctrl >> 9;
@@ -230,7 +227,7 @@ static inline void timer_watchdog_update(struct fs_timer_t *t, uint32_t value) @@ -230,7 +227,7 @@ static inline void timer_watchdog_update(struct fs_timer_t *t, uint32_t value)
230 wd_en, new_key, wd_key, new_cmd, wd_cnt)); 227 wd_en, new_key, wd_key, new_cmd, wd_cnt));
231 228
232 if (t->wd_hits) 229 if (t->wd_hits)
233 - qemu_irq_lower(t->nmi[0]); 230 + qemu_irq_lower(t->nmi);
234 231
235 t->wd_hits = 0; 232 t->wd_hits = 0;
236 233
@@ -249,7 +246,7 @@ static inline void timer_watchdog_update(struct fs_timer_t *t, uint32_t value) @@ -249,7 +246,7 @@ static inline void timer_watchdog_update(struct fs_timer_t *t, uint32_t value)
249 static void 246 static void
250 timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value) 247 timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
251 { 248 {
252 - struct fs_timer_t *t = opaque; 249 + struct etrax_timer *t = opaque;
253 250
254 switch (addr) 251 switch (addr)
255 { 252 {
@@ -301,7 +298,7 @@ static CPUWriteMemoryFunc *timer_write[] = { @@ -301,7 +298,7 @@ static CPUWriteMemoryFunc *timer_write[] = {
301 298
302 static void etraxfs_timer_reset(void *opaque) 299 static void etraxfs_timer_reset(void *opaque)
303 { 300 {
304 - struct fs_timer_t *t = opaque; 301 + struct etrax_timer *t = opaque;
305 302
306 ptimer_stop(t->ptimer_t0); 303 ptimer_stop(t->ptimer_t0);
307 ptimer_stop(t->ptimer_t1); 304 ptimer_stop(t->ptimer_t1);
@@ -309,29 +306,34 @@ static void etraxfs_timer_reset(void *opaque) @@ -309,29 +306,34 @@ static void etraxfs_timer_reset(void *opaque)
309 t->rw_wd_ctrl = 0; 306 t->rw_wd_ctrl = 0;
310 t->r_intr = 0; 307 t->r_intr = 0;
311 t->rw_intr_mask = 0; 308 t->rw_intr_mask = 0;
312 - qemu_irq_lower(t->irq[0]); 309 + qemu_irq_lower(t->irq);
313 } 310 }
314 311
315 -void etraxfs_timer_init(CPUState *env, qemu_irq *irqs, qemu_irq *nmi,  
316 - target_phys_addr_t base) 312 +static void etraxfs_timer_init(SysBusDevice *dev)
317 { 313 {
318 - static struct fs_timer_t *t; 314 + struct etrax_timer *t = FROM_SYSBUS(typeof (*t), dev);
319 int timer_regs; 315 int timer_regs;
320 316
321 - t = qemu_mallocz(sizeof *t);  
322 -  
323 t->bh_t0 = qemu_bh_new(timer0_hit, t); 317 t->bh_t0 = qemu_bh_new(timer0_hit, t);
324 t->bh_t1 = qemu_bh_new(timer1_hit, t); 318 t->bh_t1 = qemu_bh_new(timer1_hit, t);
325 t->bh_wd = qemu_bh_new(watchdog_hit, t); 319 t->bh_wd = qemu_bh_new(watchdog_hit, t);
326 t->ptimer_t0 = ptimer_init(t->bh_t0); 320 t->ptimer_t0 = ptimer_init(t->bh_t0);
327 t->ptimer_t1 = ptimer_init(t->bh_t1); 321 t->ptimer_t1 = ptimer_init(t->bh_t1);
328 t->ptimer_wd = ptimer_init(t->bh_wd); 322 t->ptimer_wd = ptimer_init(t->bh_wd);
329 - t->irq = irqs;  
330 - t->nmi = nmi;  
331 - t->env = env; 323 +
  324 + sysbus_init_irq(dev, &t->irq);
  325 + sysbus_init_irq(dev, &t->nmi);
332 326
333 timer_regs = cpu_register_io_memory(0, timer_read, timer_write, t); 327 timer_regs = cpu_register_io_memory(0, timer_read, timer_write, t);
334 - cpu_register_physical_memory (base, 0x5c, timer_regs); 328 + sysbus_init_mmio(dev, 0x5c, timer_regs);
335 329
336 qemu_register_reset(etraxfs_timer_reset, t); 330 qemu_register_reset(etraxfs_timer_reset, t);
337 } 331 }
  332 +
  333 +static void etraxfs_timer_register(void)
  334 +{
  335 + sysbus_register_dev("etraxfs,timer", sizeof (struct etrax_timer),
  336 + etraxfs_timer_init);
  337 +}
  338 +
  339 +device_init(etraxfs_timer_register)