gwj / at91sam9263 · Commits

Commit 3aa22b4b53d4a8f5ae6b073c7c267b6ec9aabf63

Authored by pbrook
1 parent af2f6733

Fix Thumb variable shift condition code bug. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1748 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 4 additions and 0 deletions
target-arm/translate.c
  View file @3aa22b4
... ... @@ -1930,12 +1930,15 @@ static void disas_thumb_insn(DisasContext *s)
1930 1930 break;
1931 1931 case 0x2: /* lsl */
1932 1932 gen_op_shll_T1_T0_cc();
  1933 + gen_op_logic_T1_cc();
1933 1934 break;
1934 1935 case 0x3: /* lsr */
1935 1936 gen_op_shrl_T1_T0_cc();
  1937 + gen_op_logic_T1_cc();
1936 1938 break;
1937 1939 case 0x4: /* asr */
1938 1940 gen_op_sarl_T1_T0_cc();
  1941 + gen_op_logic_T1_cc();
1939 1942 break;
1940 1943 case 0x5: /* adc */
1941 1944 gen_op_adcl_T0_T1_cc();
... ... @@ -1945,6 +1948,7 @@ static void disas_thumb_insn(DisasContext *s)
1945 1948 break;
1946 1949 case 0x7: /* ror */
1947 1950 gen_op_rorl_T1_T0_cc();
  1951 + gen_op_logic_T1_cc();
1948 1952 break;
1949 1953 case 0x8: /* tst */
1950 1954 gen_op_andl_T0_T1();
... ...