gwj / at91sam9263 · Commits

Commit 391c11cf0eddebfacde080ac466f66fc66c0a792

Authored by Grzegorz Jabłoński
1 parent 00a95789

Added handling of PSR (simpified)

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Showing 2 changed files with 12 additions and 11 deletions
hw/at91_pio.c
  View file @391c11c
@@ -194,10 +194,12 @@ static void at91_pio_mem_write(void *opaque, target_phys_addr_t offset, @@ -194,10 +194,12 @@ static void at91_pio_mem_write(void *opaque, target_phys_addr_t offset,
194 uint32_t prev; 194 uint32_t prev;
195 switch (offset) { 195 switch (offset) {
196 case PIO_PER: 196 case PIO_PER:
197 - s->psr |= value; 197 + s->psr |= value; //we should also detect LED state change in some cases
  198 + //printf("enabling, psr=0x%08x\n", s->psr);
198 break; 199 break;
199 case PIO_PDR: 200 case PIO_PDR:
200 s->psr &= ~value; 201 s->psr &= ~value;
  202 + //printf("disabling, psr=0x%08x\n", s->psr);
201 break; 203 break;
202 case PIO_OER: 204 case PIO_OER:
203 s->osr |= value; 205 s->osr |= value;
@@ -215,10 +217,10 @@ static void at91_pio_mem_write(void *opaque, target_phys_addr_t offset, @@ -215,10 +217,10 @@ static void at91_pio_mem_write(void *opaque, target_phys_addr_t offset,
215 prev = s->odsr; 217 prev = s->odsr;
216 s->odsr |= value; 218 s->odsr |= value;
217 for (i = 0; i < PIO_PINS; i++) 219 for (i = 0; i < PIO_PINS; i++)
218 - if (value & (1 << i) & s->osr) 220 + if (value & (1 << i) & s->osr & s->psr)
219 { 221 {
220 qemu_set_irq(s->out[i], 1); 222 qemu_set_irq(s->out[i], 1);
221 - if(prev != s->odsr) 223 + if((prev & (1 << i)) != (s->odsr & (1 << i)))
222 { 224 {
223 DPRINTF("Port %c%d set\n",'A' + s->portid, i); 225 DPRINTF("Port %c%d set\n",'A' + s->portid, i);
224 if ((s->portid == 1) && (i == 8)) 226 if ((s->portid == 1) && (i == 8))
@@ -232,10 +234,10 @@ static void at91_pio_mem_write(void *opaque, target_phys_addr_t offset, @@ -232,10 +234,10 @@ static void at91_pio_mem_write(void *opaque, target_phys_addr_t offset,
232 prev = s->odsr; 234 prev = s->odsr;
233 s->odsr &= ~value; 235 s->odsr &= ~value;
234 for (i = 0; i < PIO_PINS; i++) 236 for (i = 0; i < PIO_PINS; i++)
235 - if (value & (1 << i) & s->osr) 237 + if (value & (1 << i) & s->osr & s->psr)
236 { 238 {
237 qemu_set_irq(s->out[i], 0); 239 qemu_set_irq(s->out[i], 0);
238 - if(prev != s->odsr) 240 + if((prev & (1 << i)) != (s->odsr & (1 << i)))
239 { 241 {
240 DPRINTF("Port %c%d reset\n",'A' + s->portid, i); 242 DPRINTF("Port %c%d reset\n",'A' + s->portid, i);
241 if ((s->portid == 1) && (i == 8)) 243 if ((s->portid == 1) && (i == 8))
virtual_lab/main.c
  View file @391c11c
@@ -2,6 +2,7 @@ @@ -2,6 +2,7 @@
2 #include <stdbool.h> 2 #include <stdbool.h>
3 3
4 #define PA_PER (*((volatile uint32_t*)0xFFFFF200)) 4 #define PA_PER (*((volatile uint32_t*)0xFFFFF200))
  5 +#define PA_PDR (*((volatile uint32_t*)0xFFFFF204))
5 #define PA_OER (*((volatile uint32_t*)0xFFFFF210)) 6 #define PA_OER (*((volatile uint32_t*)0xFFFFF210))
6 #define PA_SODR (*((volatile uint32_t*)0xFFFFF230)) 7 #define PA_SODR (*((volatile uint32_t*)0xFFFFF230))
7 #define PA_CODR (*((volatile uint32_t*)0xFFFFF234)) 8 #define PA_CODR (*((volatile uint32_t*)0xFFFFF234))
@@ -9,6 +10,7 @@ @@ -9,6 +10,7 @@
9 10
10 11
11 #define PB_PER (*((volatile uint32_t*)0xFFFFF400)) 12 #define PB_PER (*((volatile uint32_t*)0xFFFFF400))
  13 +#define PB_PDR (*((volatile uint32_t*)0xFFFFF404))
12 #define PB_OER (*((volatile uint32_t*)0xFFFFF410)) 14 #define PB_OER (*((volatile uint32_t*)0xFFFFF410))
13 #define PB_SODR (*((volatile uint32_t*)0xFFFFF430)) 15 #define PB_SODR (*((volatile uint32_t*)0xFFFFF430))
14 #define PB_CODR (*((volatile uint32_t*)0xFFFFF434)) 16 #define PB_CODR (*((volatile uint32_t*)0xFFFFF434))
@@ -46,13 +48,10 @@ void delay(void) @@ -46,13 +48,10 @@ void delay(void)
46 48
47 int main(void) 49 int main(void)
48 { 50 {
49 - PMC_PCER = 1 << PER_ID_PBIOC_TO_PIOE;  
50 -  
51 - PA_PER = 0x23; //PIO enable register  
52 - PA_OER = 0x54; //PIO controller output enable register  
53 -  
54 - 51 + PMC_PCER = 1 << PER_ID_PBIOC_TO_PIOE;
55 PB_PER = DS1; //PIO enable register 52 PB_PER = DS1; //PIO enable register
  53 +// PB_PDR = 0xffffffff; //PIO disable register
  54 +
56 PB_OER = DS1; //PIO controller output enable register 55 PB_OER = DS1; //PIO controller output enable register
57 PC_PER = DS2 | BT1 | BT2; //PIO enable register 56 PC_PER = DS2 | BT1 | BT2; //PIO enable register
58 PC_OER = DS2; //PIO controller output enable register 57 PC_OER = DS2; //PIO controller output enable register