gwj / at91sam9263 · Commits

Commit 35730fa05511cfbf19341aedf8bfd526dfc7d90f

Authored by aurel32
1 parent 0add30cf

hpet config mask fix 

I discovered a bug in the hpet code that caused Windows to boot without
hpet. The config mask I was using was preventing the guest from placing
the hpet into 32 bit mode.

(Beth Kon)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6357 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 2 changed files with 6 additions and 2 deletions
hw/hpet.c
  View file @35730fa
@@ -388,7 +388,8 @@ static void hpet_ram_writel(void *opaque, target_phys_addr_t addr, @@ -388,7 +388,8 @@ static void hpet_ram_writel(void *opaque, target_phys_addr_t addr,
388 switch ((addr - 0x100) % 0x20) { 388 switch ((addr - 0x100) % 0x20) {
389 case HPET_TN_CFG: 389 case HPET_TN_CFG:
390 dprintf("qemu: hpet_ram_writel HPET_TN_CFG\n"); 390 dprintf("qemu: hpet_ram_writel HPET_TN_CFG\n");
391 - timer->config = hpet_fixup_reg(new_val, old_val, 0x3e4e); 391 + timer->config = hpet_fixup_reg(new_val, old_val,
  392 + HPET_TN_CFG_WRITE_MASK);
392 if (new_val & HPET_TN_32BIT) { 393 if (new_val & HPET_TN_32BIT) {
393 timer->cmp = (uint32_t)timer->cmp; 394 timer->cmp = (uint32_t)timer->cmp;
394 timer->period = (uint32_t)timer->period; 395 timer->period = (uint32_t)timer->period;
@@ -456,7 +457,8 @@ static void hpet_ram_writel(void *opaque, target_phys_addr_t addr, @@ -456,7 +457,8 @@ static void hpet_ram_writel(void *opaque, target_phys_addr_t addr,
456 case HPET_ID: 457 case HPET_ID:
457 return; 458 return;
458 case HPET_CFG: 459 case HPET_CFG:
459 - s->config = hpet_fixup_reg(new_val, old_val, 0x3); 460 + s->config = hpet_fixup_reg(new_val, old_val,
  461 + HPET_CFG_WRITE_MASK);
460 if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) { 462 if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) {
461 /* Enable main counter and interrupt generation. */ 463 /* Enable main counter and interrupt generation. */
462 s->hpet_offset = ticks_to_ns(s->hpet_counter) 464 s->hpet_offset = ticks_to_ns(s->hpet_counter)
hw/hpet_emul.h
  View file @35730fa
@@ -36,6 +36,7 @@ @@ -36,6 +36,7 @@
36 #define HPET_TN_CFG 0x000 36 #define HPET_TN_CFG 0x000
37 #define HPET_TN_CMP 0x008 37 #define HPET_TN_CMP 0x008
38 #define HPET_TN_ROUTE 0x010 38 #define HPET_TN_ROUTE 0x010
  39 +#define HPET_CFG_WRITE_MASK 0x3
39 40
40 41
41 #define HPET_TN_ENABLE 0x004 42 #define HPET_TN_ENABLE 0x004
@@ -45,6 +46,7 @@ @@ -45,6 +46,7 @@
45 #define HPET_TN_SETVAL 0x040 46 #define HPET_TN_SETVAL 0x040
46 #define HPET_TN_32BIT 0x100 47 #define HPET_TN_32BIT 0x100
47 #define HPET_TN_INT_ROUTE_MASK 0x3e00 48 #define HPET_TN_INT_ROUTE_MASK 0x3e00
  49 +#define HPET_TN_CFG_WRITE_MASK 0x3f4e
48 #define HPET_TN_INT_ROUTE_SHIFT 9 50 #define HPET_TN_INT_ROUTE_SHIFT 9
49 #define HPET_TN_INT_ROUTE_CAP_SHIFT 32 51 #define HPET_TN_INT_ROUTE_CAP_SHIFT 32
50 #define HPET_TN_CFG_BITS_READONLY_OR_RESERVED 0xffff80b1U 52 #define HPET_TN_CFG_BITS_READONLY_OR_RESERVED 0xffff80b1U