gwj / at91sam9263 · Commits

Commit 356c7ff4b699fb80ece580feb5e7a0c2ae9c93eb

Authored by Naphtali Sprei
Committed by Anthony Liguori
1 parent f3519986

fix for bad macaddr of e1000 in Windows 2003 server with original MS driver 

The sequence of reading from eeprom is "offset by one" moved because of a false
detection of a clock cycle after an eeprom reset. Keeping the last clock value
after a reset keeps it in sync.

Signed-off-by: Naphtali Sprei <nsprei@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Inline Side-by-side
Showing 1 changed file with 5 additions and 0 deletions
hw/e1000.c
  View file @356c7ff
@@ -261,6 +261,11 @@ set_eecd(E1000State *s, int index, uint32_t val) @@ -261,6 +261,11 @@ set_eecd(E1000State *s, int index, uint32_t val)
261 } 261 }
262 if (!(val & E1000_EECD_CS)) { // rising, no CS (EEPROM reset) 262 if (!(val & E1000_EECD_CS)) { // rising, no CS (EEPROM reset)
263 memset(&s->eecd_state, 0, sizeof s->eecd_state); 263 memset(&s->eecd_state, 0, sizeof s->eecd_state);
  264 + /*
  265 + * restore old_eecd's E1000_EECD_SK (known to be on)
  266 + * to avoid false detection of a clock edge
  267 + */
  268 + s->eecd_state.old_eecd = E1000_EECD_SK;
264 return; 269 return;
265 } 270 }
266 s->eecd_state.val_in <<= 1; 271 s->eecd_state.val_in <<= 1;