Commit 325f27475d8b9120bdabf71a1f592f9986874e70
1 parent
f4078236
Sparc32: convert idreg to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Showing
1 changed file
with
42 additions
and
8 deletions
hw/sun4m.c
| @@ -382,6 +382,46 @@ static void lance_init(NICInfo *nd, target_phys_addr_t leaddr, | @@ -382,6 +382,46 @@ static void lance_init(NICInfo *nd, target_phys_addr_t leaddr, | ||
| 382 | *reset = qdev_get_gpio_in(dev, 0); | 382 | *reset = qdev_get_gpio_in(dev, 0); |
| 383 | } | 383 | } |
| 384 | 384 | ||
| 385 | +/* NCR89C100/MACIO Internal ID register */ | ||
| 386 | +static const uint8_t idreg_data[] = { 0xfe, 0x81, 0x01, 0x03 }; | ||
| 387 | + | ||
| 388 | +static void idreg_init(target_phys_addr_t addr) | ||
| 389 | +{ | ||
| 390 | + DeviceState *dev; | ||
| 391 | + SysBusDevice *s; | ||
| 392 | + | ||
| 393 | + dev = qdev_create(NULL, "macio_idreg"); | ||
| 394 | + qdev_init(dev); | ||
| 395 | + s = sysbus_from_qdev(dev); | ||
| 396 | + | ||
| 397 | + sysbus_mmio_map(s, 0, addr); | ||
| 398 | + cpu_physical_memory_write_rom(addr, idreg_data, sizeof(idreg_data)); | ||
| 399 | +} | ||
| 400 | + | ||
| 401 | +static void idreg_init1(SysBusDevice *dev) | ||
| 402 | +{ | ||
| 403 | + ram_addr_t idreg_offset; | ||
| 404 | + | ||
| 405 | + idreg_offset = qemu_ram_alloc(sizeof(idreg_data)); | ||
| 406 | + sysbus_init_mmio(dev, sizeof(idreg_data), idreg_offset | IO_MEM_ROM); | ||
| 407 | +} | ||
| 408 | + | ||
| 409 | +static SysBusDeviceInfo idreg_info = { | ||
| 410 | + .init = idreg_init1, | ||
| 411 | + .qdev.name = "macio_idreg", | ||
| 412 | + .qdev.size = sizeof(SysBusDevice), | ||
| 413 | + .qdev.props = (DevicePropList[]) { | ||
| 414 | + {.name = NULL} | ||
| 415 | + } | ||
| 416 | +}; | ||
| 417 | + | ||
| 418 | +static void idreg_register_devices(void) | ||
| 419 | +{ | ||
| 420 | + sysbus_register_withprop(&idreg_info); | ||
| 421 | +} | ||
| 422 | + | ||
| 423 | +device_init(idreg_register_devices); | ||
| 424 | + | ||
| 385 | static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, | 425 | static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, |
| 386 | const char *boot_device, | 426 | const char *boot_device, |
| 387 | const char *kernel_filename, | 427 | const char *kernel_filename, |
| @@ -397,7 +437,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, | @@ -397,7 +437,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, | ||
| 397 | qemu_irq *esp_reset, *le_reset; | 437 | qemu_irq *esp_reset, *le_reset; |
| 398 | qemu_irq *fdc_tc; | 438 | qemu_irq *fdc_tc; |
| 399 | qemu_irq *cpu_halt; | 439 | qemu_irq *cpu_halt; |
| 400 | - ram_addr_t ram_offset, prom_offset, idreg_offset; | 440 | + ram_addr_t ram_offset, prom_offset; |
| 401 | unsigned long kernel_size; | 441 | unsigned long kernel_size; |
| 402 | int ret; | 442 | int ret; |
| 403 | char *filename; | 443 | char *filename; |
| @@ -477,13 +517,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, | @@ -477,13 +517,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size, | ||
| 477 | hwdef->clock_irq); | 517 | hwdef->clock_irq); |
| 478 | 518 | ||
| 479 | if (hwdef->idreg_base) { | 519 | if (hwdef->idreg_base) { |
| 480 | - static const uint8_t idreg_data[] = { 0xfe, 0x81, 0x01, 0x03 }; | ||
| 481 | - | ||
| 482 | - idreg_offset = qemu_ram_alloc(sizeof(idreg_data)); | ||
| 483 | - cpu_register_physical_memory(hwdef->idreg_base, sizeof(idreg_data), | ||
| 484 | - idreg_offset | IO_MEM_ROM); | ||
| 485 | - cpu_physical_memory_write_rom(hwdef->idreg_base, idreg_data, | ||
| 486 | - sizeof(idreg_data)); | 520 | + idreg_init(hwdef->idreg_base); |
| 487 | } | 521 | } |
| 488 | 522 | ||
| 489 | iommu = iommu_init(hwdef->iommu_base, hwdef->iommu_version, | 523 | iommu = iommu_init(hwdef->iommu_base, hwdef->iommu_version, |