gwj / at91sam9263 · Commits

Commit 312179c4192fa80d002de0ae2b5fe29e1f54ae4b

Authored by aurel32
1 parent d03ef511

target-ppc: indentation fixes 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5556 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 6 additions and 6 deletions
target-ppc/translate.c
  View file @312179c
@@ -1410,7 +1410,7 @@ GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER) @@ -1410,7 +1410,7 @@ GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER)
1410 { 1410 {
1411 /* Optimisation for "set to zero" case */ 1411 /* Optimisation for "set to zero" case */
1412 if (rS(ctx->opcode) != rB(ctx->opcode)) 1412 if (rS(ctx->opcode) != rB(ctx->opcode))
1413 - tcg_gen_xor_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); 1413 + tcg_gen_xor_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
1414 else 1414 else
1415 tcg_gen_movi_tl(cpu_gpr[rA(ctx->opcode)], 0); 1415 tcg_gen_movi_tl(cpu_gpr[rA(ctx->opcode)], 0);
1416 if (unlikely(Rc(ctx->opcode) != 0)) 1416 if (unlikely(Rc(ctx->opcode) != 0))
@@ -2484,7 +2484,7 @@ static always_inline void gen_qemu_ld64(TCGv t0, TCGv t1, int flags) @@ -2484,7 +2484,7 @@ static always_inline void gen_qemu_ld64(TCGv t0, TCGv t1, int flags)
2484 { 2484 {
2485 gen_qemu_ld64_ppc64(t0, t1, flags); 2485 gen_qemu_ld64_ppc64(t0, t1, flags);
2486 if (unlikely(flags & 1)) 2486 if (unlikely(flags & 1))
2487 - tcg_gen_bswap_i64(t0, t0); 2487 + tcg_gen_bswap_i64(t0, t0);
2488 } 2488 }
2489 2489
2490 static always_inline void gen_qemu_st8(TCGv t0, TCGv t1, int flags) 2490 static always_inline void gen_qemu_st8(TCGv t0, TCGv t1, int flags)
@@ -2531,7 +2531,7 @@ static always_inline void gen_qemu_st64(TCGv t0, TCGv t1, int flags) @@ -2531,7 +2531,7 @@ static always_inline void gen_qemu_st64(TCGv t0, TCGv t1, int flags)
2531 TCGv temp = tcg_temp_new(TCG_TYPE_I64); 2531 TCGv temp = tcg_temp_new(TCG_TYPE_I64);
2532 tcg_gen_bswap_i64(temp, t0); 2532 tcg_gen_bswap_i64(temp, t0);
2533 gen_qemu_st64_ppc64(temp, t1, flags); 2533 gen_qemu_st64_ppc64(temp, t1, flags);
2534 - tcg_temp_free(temp); 2534 + tcg_temp_free(temp);
2535 } else 2535 } else
2536 gen_qemu_st64_ppc64(t0, t1, flags); 2536 gen_qemu_st64_ppc64(t0, t1, flags);
2537 } 2537 }
@@ -2614,7 +2614,7 @@ static always_inline void gen_qemu_st16(TCGv t0, TCGv t1, int flags) @@ -2614,7 +2614,7 @@ static always_inline void gen_qemu_st16(TCGv t0, TCGv t1, int flags)
2614 tcg_gen_ext16u_i32(temp, t0); 2614 tcg_gen_ext16u_i32(temp, t0);
2615 tcg_gen_bswap16_i32(temp, temp); 2615 tcg_gen_bswap16_i32(temp, temp);
2616 gen_qemu_st16_ppc32(temp, t1, flags >> 1); 2616 gen_qemu_st16_ppc32(temp, t1, flags >> 1);
2617 - tcg_temp_free(temp); 2617 + tcg_temp_free(temp);
2618 } else 2618 } else
2619 gen_qemu_st16_ppc32(t0, t1, flags >> 1); 2619 gen_qemu_st16_ppc32(t0, t1, flags >> 1);
2620 } 2620 }
@@ -2625,7 +2625,7 @@ static always_inline void gen_qemu_st32(TCGv t0, TCGv t1, int flags) @@ -2625,7 +2625,7 @@ static always_inline void gen_qemu_st32(TCGv t0, TCGv t1, int flags)
2625 TCGv temp = tcg_temp_new(TCG_TYPE_I32); 2625 TCGv temp = tcg_temp_new(TCG_TYPE_I32);
2626 tcg_gen_bswap_i32(temp, t0); 2626 tcg_gen_bswap_i32(temp, t0);
2627 gen_qemu_st32_ppc32(temp, t1, flags >> 1); 2627 gen_qemu_st32_ppc32(temp, t1, flags >> 1);
2628 - tcg_temp_free(temp); 2628 + tcg_temp_free(temp);
2629 } else 2629 } else
2630 gen_qemu_st32_ppc32(t0, t1, flags >> 1); 2630 gen_qemu_st32_ppc32(t0, t1, flags >> 1);
2631 } 2631 }
@@ -2636,7 +2636,7 @@ static always_inline void gen_qemu_st64(TCGv t0, TCGv t1, int flags) @@ -2636,7 +2636,7 @@ static always_inline void gen_qemu_st64(TCGv t0, TCGv t1, int flags)
2636 TCGv temp = tcg_temp_new(TCG_TYPE_I64); 2636 TCGv temp = tcg_temp_new(TCG_TYPE_I64);
2637 tcg_gen_bswap_i64(temp, t0); 2637 tcg_gen_bswap_i64(temp, t0);
2638 gen_qemu_st64_ppc32(temp, t1, flags >> 1); 2638 gen_qemu_st64_ppc32(temp, t1, flags >> 1);
2639 - tcg_temp_free(temp); 2639 + tcg_temp_free(temp);
2640 } else 2640 } else
2641 gen_qemu_st64_ppc32(t0, t1, flags >> 1); 2641 gen_qemu_st64_ppc32(t0, t1, flags >> 1);
2642 } 2642 }