gwj / at91sam9263 · Commits

Commit 30aa5c0d303c334c646e9db1ebadda0c0db8b13f

Authored by aurel32
1 parent 5e85404a

Convert from DOS to UNIX format, no code change. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4043 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 123 additions and 123 deletions
hw/ds1225y.c
  View file @30aa5c0
1 -/*  
2 - * QEMU NVRAM emulation for DS1225Y chip  
3 - *  
4 - * Copyright (c) 2007 Hervé Poussineau  
5 - *  
6 - * Permission is hereby granted, free of charge, to any person obtaining a copy  
7 - * of this software and associated documentation files (the "Software"), to deal  
8 - * in the Software without restriction, including without limitation the rights  
9 - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell  
10 - * copies of the Software, and to permit persons to whom the Software is  
11 - * furnished to do so, subject to the following conditions:  
12 - *  
13 - * The above copyright notice and this permission notice shall be included in  
14 - * all copies or substantial portions of the Software.  
15 - *  
16 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR  
17 - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,  
18 - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL  
19 - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER  
20 - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,  
21 - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN  
22 - * THE SOFTWARE.  
23 - */  
24 -  
25 -#include "hw.h"  
26 -#include "mips.h"  
27 -#include "nvram.h"  
28 -  
29 -typedef enum  
30 -{  
31 - none = 0,  
32 - readmode,  
33 - writemode,  
34 -} nvram_open_mode;  
35 -  
36 -struct ds1225y_t  
37 -{  
38 - target_phys_addr_t mem_base;  
39 - uint32_t capacity;  
40 - const char *filename;  
41 - QEMUFile *file;  
42 - nvram_open_mode open_mode;  
43 -};  
44 -  
45 -static int ds1225y_set_to_mode(ds1225y_t *NVRAM, nvram_open_mode mode, const char *filemode)  
46 -{  
47 - if (NVRAM->open_mode != mode)  
48 - {  
49 - if (NVRAM->file)  
50 - qemu_fclose(NVRAM->file);  
51 - NVRAM->file = qemu_fopen(NVRAM->filename, filemode);  
52 - NVRAM->open_mode = mode;  
53 - }  
54 - return (NVRAM->file != NULL);  
55 -}  
56 -  
57 -static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)  
58 -{  
59 - ds1225y_t *NVRAM = opaque;  
60 - int64_t pos;  
61 -  
62 - pos = addr - NVRAM->mem_base;  
63 - if (addr >= NVRAM->capacity)  
64 - addr -= NVRAM->capacity;  
65 -  
66 - if (!ds1225y_set_to_mode(NVRAM, readmode, "rb"))  
67 - return 0;  
68 - qemu_fseek(NVRAM->file, pos, SEEK_SET);  
69 - return (uint32_t)qemu_get_byte(NVRAM->file);  
70 -}  
71 -  
72 -static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)  
73 -{  
74 - ds1225y_t *NVRAM = opaque;  
75 - int64_t pos;  
76 -  
77 - pos = addr - NVRAM->mem_base;  
78 - if (ds1225y_set_to_mode(NVRAM, writemode, "wb"))  
79 - {  
80 - qemu_fseek(NVRAM->file, pos, SEEK_SET);  
81 - qemu_put_byte(NVRAM->file, (int)value);  
82 - }  
83 -}  
84 -  
85 -static CPUReadMemoryFunc *nvram_read[] = {  
86 - &nvram_readb,  
87 - NULL,  
88 - NULL,  
89 -};  
90 -  
91 -static CPUWriteMemoryFunc *nvram_write[] = {  
92 - &nvram_writeb,  
93 - NULL,  
94 - NULL,  
95 -};  
96 -  
97 -static CPUWriteMemoryFunc *nvram_none[] = {  
98 - NULL,  
99 - NULL,  
100 - NULL,  
101 -};  
102 -  
103 -/* Initialisation routine */  
104 -ds1225y_t *ds1225y_init(target_phys_addr_t mem_base, const char *filename)  
105 -{  
106 - ds1225y_t *s;  
107 - int mem_index1, mem_index2;  
108 -  
109 - s = qemu_mallocz(sizeof(ds1225y_t));  
110 - if (!s)  
111 - return NULL;  
112 - s->mem_base = mem_base;  
113 - s->capacity = 0x2000; /* Fixed for ds1225y chip: 8K */  
114 - s->filename = filename;  
115 -  
116 - /* Read/write memory */  
117 - mem_index1 = cpu_register_io_memory(0, nvram_read, nvram_write, s);  
118 - cpu_register_physical_memory(mem_base, s->capacity, mem_index1);  
119 - /* Read-only memory */  
120 - mem_index2 = cpu_register_io_memory(0, nvram_read, nvram_none, s);  
121 - cpu_register_physical_memory(mem_base + s->capacity, s->capacity, mem_index2);  
122 - return s;  
123 -} 1 +/*
  2 + * QEMU NVRAM emulation for DS1225Y chip
  3 + *
  4 + * Copyright (c) 2007 Hervé Poussineau
  5 + *
  6 + * Permission is hereby granted, free of charge, to any person obtaining a copy
  7 + * of this software and associated documentation files (the "Software"), to deal
  8 + * in the Software without restriction, including without limitation the rights
  9 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 + * copies of the Software, and to permit persons to whom the Software is
  11 + * furnished to do so, subject to the following conditions:
  12 + *
  13 + * The above copyright notice and this permission notice shall be included in
  14 + * all copies or substantial portions of the Software.
  15 + *
  16 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 + * THE SOFTWARE.
  23 + */
  24 +
  25 +#include "hw.h"
  26 +#include "mips.h"
  27 +#include "nvram.h"
  28 +
  29 +typedef enum
  30 +{
  31 + none = 0,
  32 + readmode,
  33 + writemode,
  34 +} nvram_open_mode;
  35 +
  36 +struct ds1225y_t
  37 +{
  38 + target_phys_addr_t mem_base;
  39 + uint32_t capacity;
  40 + const char *filename;
  41 + QEMUFile *file;
  42 + nvram_open_mode open_mode;
  43 +};
  44 +
  45 +static int ds1225y_set_to_mode(ds1225y_t *NVRAM, nvram_open_mode mode, const char *filemode)
  46 +{
  47 + if (NVRAM->open_mode != mode)
  48 + {
  49 + if (NVRAM->file)
  50 + qemu_fclose(NVRAM->file);
  51 + NVRAM->file = qemu_fopen(NVRAM->filename, filemode);
  52 + NVRAM->open_mode = mode;
  53 + }
  54 + return (NVRAM->file != NULL);
  55 +}
  56 +
  57 +static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)
  58 +{
  59 + ds1225y_t *NVRAM = opaque;
  60 + int64_t pos;
  61 +
  62 + pos = addr - NVRAM->mem_base;
  63 + if (addr >= NVRAM->capacity)
  64 + addr -= NVRAM->capacity;
  65 +
  66 + if (!ds1225y_set_to_mode(NVRAM, readmode, "rb"))
  67 + return 0;
  68 + qemu_fseek(NVRAM->file, pos, SEEK_SET);
  69 + return (uint32_t)qemu_get_byte(NVRAM->file);
  70 +}
  71 +
  72 +static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
  73 +{
  74 + ds1225y_t *NVRAM = opaque;
  75 + int64_t pos;
  76 +
  77 + pos = addr - NVRAM->mem_base;
  78 + if (ds1225y_set_to_mode(NVRAM, writemode, "wb"))
  79 + {
  80 + qemu_fseek(NVRAM->file, pos, SEEK_SET);
  81 + qemu_put_byte(NVRAM->file, (int)value);
  82 + }
  83 +}
  84 +
  85 +static CPUReadMemoryFunc *nvram_read[] = {
  86 + &nvram_readb,
  87 + NULL,
  88 + NULL,
  89 +};
  90 +
  91 +static CPUWriteMemoryFunc *nvram_write[] = {
  92 + &nvram_writeb,
  93 + NULL,
  94 + NULL,
  95 +};
  96 +
  97 +static CPUWriteMemoryFunc *nvram_none[] = {
  98 + NULL,
  99 + NULL,
  100 + NULL,
  101 +};
  102 +
  103 +/* Initialisation routine */
  104 +ds1225y_t *ds1225y_init(target_phys_addr_t mem_base, const char *filename)
  105 +{
  106 + ds1225y_t *s;
  107 + int mem_index1, mem_index2;
  108 +
  109 + s = qemu_mallocz(sizeof(ds1225y_t));
  110 + if (!s)
  111 + return NULL;
  112 + s->mem_base = mem_base;
  113 + s->capacity = 0x2000; /* Fixed for ds1225y chip: 8K */
  114 + s->filename = filename;
  115 +
  116 + /* Read/write memory */
  117 + mem_index1 = cpu_register_io_memory(0, nvram_read, nvram_write, s);
  118 + cpu_register_physical_memory(mem_base, s->capacity, mem_index1);
  119 + /* Read-only memory */
  120 + mem_index2 = cpu_register_io_memory(0, nvram_read, nvram_none, s);
  121 + cpu_register_physical_memory(mem_base + s->capacity, s->capacity, mem_index2);
  122 + return s;
  123 +}