gwj / at91sam9263 · Commits

Commit 2e23213f26fc747b3a4de3c87906bfd3399e95fa

Authored by balrog
1 parent 0e7b8a9f

Special-case iWMMXt register transfer insns, which are in ARM LDC2/STC2 class. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3107 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 12 additions and 3 deletions
target-arm/helper.c
  View file @2e23213
... ... @@ -838,9 +838,11 @@ void helper_set_cp15(CPUState *env, uint32_t insn, uint32_t val)
838 838 case 15: /* Implementation specific. */
839 839 if (arm_feature(env, ARM_FEATURE_XSCALE)) {
840 840 if (op2 == 0 && crm == 1) {
841   - /* Changes cp0 to cp13 behavior, so needs a TB flush. */
842   - tb_flush(env);
843   - env->cp15.c15_cpar = (val & 0x3fff) | 2;
  841 + if (env->cp15.c15_cpar != (val & 0x3fff)) {
  842 + /* Changes cp0 to cp13 behavior, so needs a TB flush. */
  843 + tb_flush(env);
  844 + env->cp15.c15_cpar = val & 0x3fff;
  845 + }
844 846 break;
845 847 }
846 848 goto bad_reg;
... ...
target-arm/translate.c
  View file @2e23213
... ... @@ -2230,6 +2230,13 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
2230 2230 gen_op_movl_T0_im(val);
2231 2231 gen_bx(s);
2232 2232 return;
  2233 + } else if ((insn & 0x0e000f00) == 0x0c000100) {
  2234 + if (arm_feature(env, ARM_FEATURE_IWMMXT)) {
  2235 + /* iWMMXt register transfer. */
  2236 + if (env->cp15.c15_cpar & (1 << 1))
  2237 + if (!disas_iwmmxt_insn(env, s, insn))
  2238 + return;
  2239 + }
2233 2240 } else if ((insn & 0x0fe00000) == 0x0c400000) {
2234 2241 /* Coprocessor double register transfer. */
2235 2242 } else if ((insn & 0x0f000010) == 0x0e000010) {
... ...