gwj / at91sam9263 · Commits

Commit 2e134c9c55cb4f1d8e9aca26360c006624344091

Authored by bellard
1 parent 5391d806

64-bit multiplication fix (Ulrich Hecht) 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@446 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 2 changed files with 4 additions and 4 deletions
target-arm/op.c
  View file @2e134c9
... ... @@ -368,7 +368,7 @@ void OPPROTO op_mul_T0_T1(void)
368 368 void OPPROTO op_mull_T0_T1(void)
369 369 {
370 370 uint64_t res;
371   - res = T0 * T1;
  371 + res = (uint64_t)T0 * (uint64_t)T1;
372 372 T1 = res >> 32;
373 373 T0 = res;
374 374 }
... ... @@ -377,7 +377,7 @@ void OPPROTO op_mull_T0_T1(void)
377 377 void OPPROTO op_imull_T0_T1(void)
378 378 {
379 379 uint64_t res;
380   - res = (int32_t)T0 * (int32_t)T1;
  380 + res = (int64_t)T0 * (int64_t)T1;
381 381 T1 = res >> 32;
382 382 T0 = res;
383 383 }
... ...
target-arm/translate.c
  View file @2e134c9
... ... @@ -516,9 +516,9 @@ static void disas_arm_insn(DisasContext *s)
516 516 gen_movl_T0_reg(s, rs);
517 517 gen_movl_T1_reg(s, rm);
518 518 if (insn & (1 << 22))
519   - gen_op_mull_T0_T1();
520   - else
521 519 gen_op_imull_T0_T1();
  520 + else
  521 + gen_op_mull_T0_T1();
522 522 if (insn & (1 << 21))
523 523 gen_op_addq_T0_T1(rn, rd);
524 524 if (insn & (1 << 20))
... ...